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Proceedings of the 24th Asia and South Pacific Design Automation Conference ,
2
Path controllability analysis for high quality designs:
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Proceedings of the 52nd Annual Design Automation Conference ,
3
Scalable sequence-constrained retention register minimizati..:
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Proceedings of the 49th Annual Design Automation Conference ,
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Improving gate-level simulation accuracy when unknowns exis:
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Proceedings of the Conference on Design, Automation and Test in Europe ,
5
RTL analysis and modifications for improving at-speed test:
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Proceedings of the 16th Asia and South Pacific Design Automation Conference ,
7
Facilitating unreachable code diagnosis and debugging:
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Proceedings of the 2010 Asia and South Pacific Design Automation Conference ,
8
Optimizing blocks in an SoC using symbolic code-statement r..:
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Proceedings of the Conference on Design, Automation and Test in Europe ,
11
Finding reset nondeterminism in RTL designs : scalable X..:
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12
Functional design errors in digital circuits
diagnosis, correction and repair
Lecture notes in electrical engineering ; 32
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Zentrale:E02 a inf 170 e/949
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Proceedings of the 46th Annual Design Automation Conference ,
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Handling don't-care conditions in high-level synthesis and ..:
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Proceedings of the Conference on Design, Automation and Test in Europe ,
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