Abreu, Brunno
36  Ergebnisse:
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1

A Design Framework for Neural Network Architecture Explorat..:

, In: 2024 IEEE 15th Latin America Symposium on Circuits and Systems (LASCAS),
 
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2

Mitigating Asynchronous QDI Drawbacks on MAC Operators with..:

, In: 2022 IEEE International Symposium on Circuits and Systems (ISCAS),
 
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3

A framework for designing power-efficient inference acceler..:

Abreu, Brunno ; Grellert, Mateus ; Bampi, Sergio
Engineering Applications of Artificial Intelligence.  109 (2022)  - p. 104638 , 2022
 
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4

Improved Approximate Multipliers for Single-Precision Float..:

, In: 2022 IEEE 13th Latin America Symposium on Circuits and System (LASCAS),
 
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5

On the Netlist Gate-level Pruning for Tree-based Machine Le..:

, In: 2022 IEEE 13th Latin America Symposium on Circuits and System (LASCAS),
 
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6

A Decision Tree Synthesis Flow for Precise and Approximate ..:

, In: 2022 IEEE 15th Dallas Circuit And System Conference (DCAS),
 
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7

Exploring high-order adder compressors for power reduction ..:

Paim, Guilherme ; Santana, Gustavo M. ; Abreu, Brunno A....
Journal of Real-Time Image Processing.  17 (2020)  5 - p. 1735-1754 , 2020
 
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8

VLSI Design of Tree-Based Inference for Low-Power Learning ..:

, In: 2020 IEEE International Symposium on Circuits and Systems (ISCAS),
 
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9

Exploring Motion Vector Cost with Partial Distortion Elimin..:

, In: 2019 17th IEEE International New Circuits and Systems Conference (NEWCAS),
 
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10

HEVC Interpolation Filter Architecture Using Hybrid Encodin..:

, In: 2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS),
 
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11

The 4-2 Fused Adder–Subtractor Compressor for Low-Power But..:

Silveira, Bianca ; Paim, Guilherme ; Abreu, Brunno Alves...
Circuits, Systems, and Signal Processing.  41 (2021)  3 - p. 1577-1595 , 2021
 
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