Cheng, Hsiang-Yun
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1

DL-RSIM: A Reliability and Deployment Strategy Simulation F..:

Lin, Wei-Ting ; Cheng, Hsiang-Yun ; Yang, Chia-Lin...
ACM Transactions on Embedded Computing Systems.  21 (2022)  3 - p. 1-29 , 2022
 
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4

Improving GPGPU Performance via Cache Locality Aware Thread..:

Chen, Li-Jhan ; Cheng, Hsiang-Yun ; Wang, Po-Han.
IEEE Computer Architecture Letters.  16 (2017)  2 - p. 127-131 , 2017
 
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5

LAP: loop-block aware inclusion properties for energy-effic..:

Cheng, Hsiang-Yun ; Zhao, Jishen ; Sampson, Jack...
ACM SIGARCH Computer Architecture News.  44 (2016)  3 - p. 103-114 , 2016
 
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6

EECache: A Comprehensive Study on the Architectural Design ..:

Cheng, Hsiang-Yun ; Poremba, Matt ; Shahidi, Narges...
ACM Transactions on Architecture and Code Optimization.  12 (2015)  2 - p. 1-22 , 2015
 
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7

EECache : A Comprehensive Study on the Architectural Des..:

Cheng, Hsiang-Yun ; Poremba, Matt ; Shahidi, Narges...
ACM Transactions on Architecture and Code Optimization (TACO).  12 (2015)  2 - p. 1-22 , 2015
 
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8

Adaptive Burst-Writes (ABW) : Memory Requests Scheduling..:

Cheng, Hsiang-Yun ; Irwin, Mary Jane ; Xie, Yuan
ACM Transactions on Design Automation of Electronic Systems (TODAES).  21 (2015)  1 - p. 1-26 , 2015
 
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9

Adaptive Burst-Writes (ABW): Memory Requests Scheduling to ..:

Cheng, Hsiang-Yun ; Irwin, Mary Jane ; Xie, Yuan
ACM Transactions on Design Automation of Electronic Systems.  21 (2015)  1 - p. 1-26 , 2015
 
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