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Fenouillet-Beranger, Claire
23  Ergebnisse:
Buchkapitel (Online) X
Personensuche X
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1

Thin film BIMOS transistor for low-power spiking neuron des..:

, In: 2019 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS),
Galy, Philippe ; Bedecarrats, Thomas ; Fenouillet-Beranger, Claire. - p. 1-4 , 2019
Link: https://doi.org/10.1109/..
 
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2

From 2D to Monolithic 3D : Design Possibilities, Expecta..:

, In: Proceedings of the 2015 Symposium on International Symposium on Physical Design,
Billoint, Olivier ; Sarhan, Hossam ; Rayane, Iyad... - p. 127 ff. , 2015
Link: https://dl.acm.org/doi/1..
 
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3

ESD robustness of FDSOI gated diode for ESD network design:..:

, In: 2010 IEEE International SOI Conference (SOI),
Benoist, Thomas ; Fenouillet-Beranger, Claire ; Perreau, Pierre... - p. 1-2 , 2010
Link: https://doi.org/10.1109/..
 
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4

3D sequential integration with Si CMOS stacked on 28nm indu..:

, In: 2023 International Electron Devices Meeting (IEDM),
Mota-Frutuoso, T. ; Lapras, V. ; Brunet, L.... - p. 1-4 , 2023
Link: https://doi.org/10.1109/..
 
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5

Methodology for Active Junction Profile Extraction in thin ..:

, In: 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits),
Frutuoso, T. Mota ; Garros, X. ; Batude, P.... - p. 332-333 , 2022
Link: https://doi.org/10.1109/..
 
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6

3D sequential integration: applications and associated key ..:

, In: 2021 IEEE International Electron Devices Meeting (IEDM),
Batude, P. ; Billoint, O. ; Thuries, S.... - p. 3.2.1-3.2.4 , 2021
Link: https://doi.org/10.1109/..
 
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7

Comparative experimental study of junctionless and inversio..:

, In: 2020 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA),
Bosch, D. ; Colinge, J.P. ; Lugo, J.... - p. 126-127 , 2020
Link: https://doi.org/10.1109/..
 
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8

Low temperature high voltage analog devices in a 3D sequent..:

, In: 2020 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA),
Cavalcante, C. ; Garros, X. ; Batude, P.... - p. 155-156 , 2020
Link: https://doi.org/10.1109/..
 
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9

All-operation-regime characterization and modeling of drain..:

, In: 2020 IEEE Symposium on VLSI Technology,
Bosch, D. ; Colinge, J.P. ; Ghibaudo, G.... - p. 1-2 , 2020
Link: https://doi.org/10.1109/..
 
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10

First demonstration of low temperature $(\leq 500^{\circ}\m..:

, In: 2020 IEEE Symposium on VLSI Technology,
Fenouillet-Beranger, C. ; Brunet, L. ; Batude, P.... - p. 1-2 , 2020
Link: https://doi.org/10.1109/..
 
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11

RF Performance of a Fully Integrated 3D Sequential Technolo..:

, In: 2019 IEEE International Electron Devices Meeting (IEDM),
Garros, X. ; Lacord, J. ; Triantopoulos, K.... - p. 25.1.1-25.1.4 , 2019
Link: https://doi.org/10.1109/..
 
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12

Novel Fine-Grain Back-Bias Assist Techniques for 14nm FDSOI..:

, In: 2019 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA),
Bosch, D. ; Andrieu, F. ; Ciampolini, L.... - p. 1-2 , 2019
Link: https://doi.org/10.1109/..
 
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13

Novel 1T2R1T RRAM-based Ternary Content Addressable Memory ..:

, In: 2019 IEEE International Electron Devices Meeting (IEDM),
Ly, D. R. B. ; Nowak, E. ; Vianello, E.... - p. 35.5.1-35.5.4 , 2019
Link: https://doi.org/10.1109/..
 
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14

Inter-tier Dynamic Coupling and RF Crosstalk in 3D Sequenti..:

, In: 2019 IEEE International Electron Devices Meeting (IEDM),
Sideris, P. ; Lugo-Alvarez, J. ; Batude, P.... - p. 3.4.1-3.4.4 , 2019
Link: https://doi.org/10.1109/..
 
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15

Back-bias impact on variability and BTI for 3D-monolithic 1..:

, In: 2019 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS),
Bosch, D. ; Andrieu, F. ; Garros, X.... - p. 1-4 , 2019
Link: https://doi.org/10.1109/..
 
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