Peluso, Valentino
107  Ergebnisse:
Personensuche X
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2

Enabling DVFS Side-Channel Attacks for Neural Network Finge..:

, In: 2023 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED),
 
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5

On the Efficiency of AdapTTA: An Adaptive Test-Time Augment..:

, In: VLSI-SoC: Technology Advancement on SoC Design; IFIP Advances in Information and Communication Technology,
 
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7

Monocular Depth Perception on Microcontrollers for Edge App..:

Peluso, Valentino ; Cipolletta, Antonio ; Calimera, Andrea...
IEEE Transactions on Circuits and Systems for Video Technology.  32 (2022)  3 - p. 1524-1536 , 2022
 
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8

Enabling monocular depth perception at the very edge:

, In: 2020 IEEE/CVF Conference on Computer Vision and Pattern Recognition Workshops (CVPRW),
 
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9

Optimization Tools for ConvNets on the Edge:

, In: 2020 IFIP/IEEE 28th International Conference on Very Large Scale Integration (VLSI-SOC),
 
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10

Efficacy of Topology Scaling for Temperature and Latency Co..:

Peluso, Valentino ; Rizzo, Roberto Giorgio ; Calimera, Andrea
Journal of Low Power Electronics and Applications.  10 (2020)  1 - p. 10 , 2020
 
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11

EAST: Encoding-Aware Sparse Training for Deep Memory Compre..:

, In: 2020 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS),
 
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12

Inference on the Edge: Performance Analysis of an Image Cla..:

, In: 2019 Sixth International Conference on Social Networks Analysis, Management and Security (SNAMS),
 
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13

Energy-Accuracy Scalable Deep Convolutional Neural Networks..:

, In: VLSI-SoC: Design and Engineering of Electronics Systems Based on New Computing Paradigms; IFIP Advances in Information and Communication Technology,
Peluso, Valentino ; Calimera, Andrea - p. 107-127 , 2019
 
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15

Arbitrary-Precision Convolutional Neural Networks on Low-Po..:

, In: 2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration (VLSI-SoC),
 
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