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Allibert, F
66  Ergebnisse:
Personensuche X
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1

High-resistivity with PN interface passivation in 22 nm FD-..:

Nyssens, L. ; Rack, M. ; Nabet, M....
Solid-State Electronics.  205 (2023)  - p. 108656 , 2023
Link: https://doi.org/10.1016/..
 
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2

Characterization of Thermally and Electrically Stressed Res..:

, In: 2023 IEEE International Symposium on Applications of Ferroelectrics (ISAF),
Drouin, A. ; Allibert, F. ; Ledrappier, S.... - p. 1-4 , 2023
Link: https://doi.org/10.1109/..
 
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3

Study of voltage-induced ferroelectric domain inversion on ..:

, In: 2023 IEEE International Ultrasonics Symposium (IUS),
Allibert, F. ; Drouin, A. ; Ballandras, S.... - p. 1-4 , 2023
Link: https://doi.org/10.1109/..
 
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4

PN Junctions Interface Passivation in 22 nm FDSOI for Low-L..:

, In: 2022 24th International Microwave and Radar Conference (MIKON),
Nyssens, L. ; Rack, M. ; Nabet, M.... - p. 1-4 , 2022
Link: https://doi.org/10.23919..
 
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5

SmartSiC™ for Manufacturing of SiC Power Devices:

, In: 2022 6th IEEE Electron Devices Technology & Manufacturing Conference (EDTM),
Daval, N. ; Drouin, A. ; Biard, H.... - p. 85-87 , 2022
Link: https://doi.org/10.1109/..
 
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6

High-Resistivity Substrates with PN Interface Passivation i..:

, In: 2022 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA),
Rack, M. ; Nyssens, L. ; Nabet, M.... - p. 1-2 , 2022
Link: https://doi.org/10.1109/..
 
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7

High-resistivity silicon-based substrate using buried PN ju..:

Moulin, M. ; Rack, M. ; Fache, T....
Solid-State Electronics.  194 (2022)  - p. 108301 , 2022
Link: https://doi.org/10.1016/..
 
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8

Modeling of Semiconductor Substrates for RF Applications: P..:

Rack, M. ; Allibert, F. ; Raskin, J.-P.
IEEE Transactions on Electron Devices.  68 (2021)  9 - p. 4598-4605 , 2021
Link: https://doi.org/10.1109/..
 
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9

Modeling of Semiconductor Substrates for RF Applications: P..:

Rack, M. ; Allibert, F. ; Raskin, J.-P.
IEEE Transactions on Electron Devices.  68 (2021)  9 - p. 4606-4613 , 2021
Link: https://doi.org/10.1109/..
 
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10

Special Issue: Planar Fully-Depleted SOI technology:

Allibert, F. ; Hiramoto, T. ; Nguyen, B.Y.
Solid-State Electronics.  117 (2016)  - p. 1 , 2016
Link: https://doi.org/10.1016/..
 
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11

A new characterization technique for SOI wafers: Split C(V)..:

Diab, A. ; Fernández, C. ; Ohata, A....
Solid-State Electronics.  90 (2013)  - p. 127-133 , 2013
Link: https://doi.org/10.1016/..
 
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12

Mobility in ultrathin SOI MOSFET and pseudo-MOSFET: Impact ..:

Hamaide, G. ; Allibert, F. ; Andrieu, F...
Solid-State Electronics.  57 (2011)  1 - p. 83-86 , 2011
Link: https://doi.org/10.1016/..
 
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13

Low-frequency noise in SOI pseudo-MOSFET with pressure prob..:

El Hajj Diab, A. ; Ionica, I. ; Cristoloveanu, S....
Microelectronic Engineering.  88 (2011)  7 - p. 1283-1285 , 2011
Link: https://doi.org/10.1016/..
 
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14

Defect delineation and characterization in SiGe, Ge and oth..:

Abbadie, A. ; Allibert, F. ; Brunier, F.
Solid-State Electronics.  53 (2009)  8 - p. 850-857 , 2009
Link: https://doi.org/10.1016/..
 
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15

Transport measurements in silicon-on-insulator films: Compa..:

Chandrasekhar Rao, T. V. ; Antoszewski, J. ; Faraone, L....
Journal of Applied Physics.  103 (2008)  3 - p. , 2008
Link: https://doi.org/10.1063/..
 
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