Alvarez, Lluc
92  Ergebnisse:
Personensuche X
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1

A Two Level Neural Approach Combining Off-Chip Prediction w..:

, In: 2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA),
 
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2

OpenPiton Optimizations Towards High Performance Manycores:

, In: Proceedings of the 16th International Workshop on Network on Chip Architectures,
 
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3

eProcessor : European, Extendable, Energy-Efficient, Ext..:

, In: Proceedings of the 20th ACM International Conference on Computing Frontiers,
 
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4

WFAsic: A High-Performance ASIC Accelerator for DNA Sequenc..:

, In: Proceedings of the 52nd International Conference on Parallel Processing,
Haghi, Abbas ; Alvarez, Lluc ; Front, Jordi... - p. 392-401 , 2023
 
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6

Accelerators in Embedded Systems for Machine Learning: A RI..:

, In: 2023 38th Conference on Design of Circuits and Integrated Systems (DCIS),
 
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7

A review of CNN accelerators for embedded systems based on ..:

, In: 2022 IEEE International Conference on Omni-layer Intelligent Systems (COINS),
 
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8

Page Size Aware Cache Prefetching:

, In: 2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO),
Vavouliotis, Georgios ; Chacon, Gino ; Alvarez, Lluc... - p. 956-974 , 2022
 
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11

TD-NUCA: Runtime Driven Management of NUCA Caches in Task D..:

, In: SC22: International Conference for High Performance Computing, Networking, Storage and Analysis,
Caheny, Paul ; Alvarez, Lluc ; Casas, Marc. - p. 1-15 , 2022
 
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12

Morrigan: A Composite Instruction TLB Prefetcher:

, In: MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture,
Vavouliotis, Georgios ; Alvarez, Lluc ; Grot, Boris.. - p. 1138-1153 , 2021
 
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13

Exploiting Page Table Locality for Agile TLB Prefetching:

, In: 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA),
 
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15

Exploiting page table locality for agile TLB prefetching:

, In: Proceedings of the 48th Annual International Symposium on Computer Architecture,
 
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