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X
Armstrong, G. Alastair
2011  Ergebnisse:
Personensuche X
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1

Bipolar snapback in junctionless transistors for capacitorl..:

Singh Parihar, Mukta ; Ghosh, Dipankar ; Alastair Armstrong, G..
Applied Physics Letters.  101 (2012)  26 - p. , 2012
Link: https://doi.org/10.1063/..
 
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2

Bipolar effects in unipolar junctionless transistors:

Parihar, Mukta Singh ; Ghosh, Dipankar ; Armstrong, G. Alastair...
Applied Physics Letters.  101 (2012)  9 - p. 093507 , 2012
Link: https://doi.org/10.1063/..
 
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3

Optimally designed moderately inverted double gate SOI MOSF..:

Ghosh, Dipankar ; Parihar, Mukta Singh ; Armstrong, G Alastair.
Semiconductor Science and Technology.  27 (2012)  12 - p. 125004 , 2012
Link: https://doi.org/10.1088/..
 
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4

Thermal Resistance Model for Multi-finger Trench-Isolated B..:

Rashmi, R. ; Kranti, Abhinav ; Armstrong, G. Alastair.
ECS Transactions.  19 (2009)  4 - p. 305-310 , 2009
Link: https://doi.org/10.1149/..
 
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5

Impact of gate–source/drain channel architecture on the per..:

Kranti, Abhinav ; Rashmi ; Armstrong, G Alastair
Semiconductor Science and Technology.  24 (2009)  11 - p. 115002 , 2009
Link: https://doi.org/10.1088/..
 
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6

Optimizing Spacer-to-Straggle Ratio in Underlap Double Gate..:

Kranti, Abhinav ; Rashmi, R. ; Armstrong, G. Alastair
ECS Transactions.  19 (2009)  4 - p. 283-288 , 2009
Link: https://doi.org/10.1149/..
 
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7

Performance projections and design optimization of planar d..:

Kranti, Abhinav ; Hao, Ying ; Armstrong, G Alastair
Semiconductor Science and Technology.  23 (2008)  4 - p. 045001 , 2008
Link: https://doi.org/10.1088/..
 
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8

How crucial is back gate misalignment/oversize in double ga..:

Kranti, Abhinav ; Armstrong, G. Alastair
Solid-State Electronics.  52 (2008)  12 - p. 1895-1903 , 2008
Link: https://doi.org/10.1016/..
 
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9

6-T SRAM cell design with nanoscale double-gate SOI MOSFETs..:

Rashmi ; Kranti, Abhinav ; Armstrong, G Alastair
Semiconductor Science and Technology.  23 (2008)  7 - p. 075049 , 2008
Link: https://doi.org/10.1088/..
 
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10

TCAD for Si, SiGe and GaAs integrated circuits 

IET circuits, devices and systems series ; 21
Armstrong, G. Alastair , 2007
Exemplar:  Zentrale: a elt 661 e/864
 
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11

Comparative analysis of nanoscale MOS device architectures ..:

Kranti, Abhinav ; Armstrong, G Alastair
Semiconductor Science and Technology.  22 (2007)  5 - p. 481-491 , 2007
Link: https://doi.org/10.1088/..
 
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12

Source/drain extension region engineering in nanoscale doub..:

Kranti, Abhinav ; Armstrong, G. Alastair
Microelectronic Engineering.  84 (2007)  12 - p. 2775-2784 , 2007
Link: https://doi.org/10.1016/..
 
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13

Scaling issues for analogue circuits using Double Gate SOI ..:

Lim, Tao Chuan ; Armstrong, G. Alastair
Solid-State Electronics.  51 (2007)  2 - p. 320-327 , 2007
Link: https://doi.org/10.1016/..
 
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14

Significance of Gate Underlap Architecture in FinFETs for L..:

Kranti, Abhinav ; Armstrong, G. Alastair
ECS Transactions.  6 (2007)  4 - p. 375-380 , 2007
Link: https://doi.org/10.1149/..
 
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15

Engineering source/drain extension regions in nanoscale dou..:

Kranti, Abhinav ; Alastair Armstrong, G.
Solid-State Electronics.  50 (2006)  3 - p. 437-447 , 2006
Link: https://doi.org/10.1016/..
 
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