Billoint, O.
20  Ergebnisse:
Personensuche X
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1

Charge-based Sense Demonstration in 1T-1C HZO FeRAM Arrays ..:

, In: 2024 IEEE International Memory Workshop (IMW),
Billoint, O. ; Martin, S. ; Laguerre, J.... - p. 1-4 , 2024
 
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2

3D sequential integration with Si CMOS stacked on 28nm indu..:

, In: 2023 International Electron Devices Meeting (IEDM),
Mota-Frutuoso, T. ; Lapras, V. ; Brunet, L.... - p. 1-4 , 2023
 
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3

Memory Window in Si:HfO2 FeRAM arrays: Performance Improvem..:

, In: 2023 IEEE International Memory Workshop (IMW),
Laguerre, J. ; Bocquet, M. ; Billoint, O.... - p. 1-4 , 2023
 
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4

Convolution neural network inference using frequency modula..:

, In: 2023 IEEE International Integrated Reliability Workshop (IIRW),
Trabelsi, A. ; Cagli, C. ; Hirtzlin, T.... - p. 1-4 , 2023
 
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5

Hybrid FeRAM/RRAM Synaptic Circuit Enabling On-Chip Inferen..:

, In: 2023 International Electron Devices Meeting (IEDM),
Martemucci, M. ; Rummens, F. ; Hirtzlin, T.... - p. 1-4 , 2023
 
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6

16kbit 1T1R OxRAM arrays embedded in 28nm FDSOI technology ..:

, In: 2021 IEEE International Memory Workshop (IMW),
Grenouillet, L. ; Castellani, N. ; Persico, A.... - p. 1-4 , 2021
 
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7

3D sequential integration: applications and associated key ..:

, In: 2021 IEEE International Electron Devices Meeting (IEDM),
Batude, P. ; Billoint, O. ; Thuries, S.... - p. 3.2.1-3.2.4 , 2021
 
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9

Merging PDKs to Build a Design Environment for 3D Circuits:..:

, In: 2019 International 3D Systems Integration Conference (3DIC),
 
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10

OxRAM for embedded solutions on advanced node: scaling pers..:

, In: 2019 IEEE International Electron Devices Meeting (IEDM),
Sandrini, J. ; Barlas, M. ; Nodin, J. F.... - p. 30.5.1-30.5.4 , 2019
 
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11

Dense N over CMOS 6T SRAM cells using 3D Sequential Integra..:

, In: 2017 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA),
 
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12

A comprehensive study of monolithic 3D cell on cell design ..:

, In: Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition,
Billoint, O. ; Sarhan, H. ; Rayane, I.... - p. 1192-1196 , 2015
 
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13

Ultra-wide voltage range designs in fully-depleted silicon-..:

, In: Proceedings of the Conference on Design, Automation and Test in Europe,
Beigne, E. ; Valentian, A. ; Giraud, B.... - p. 613-618 , 2013
 
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14

Distributed clock generator for synchronous SoC using ADPLL..:

, In: Proceedings of the IEEE 2013 Custom Integrated Circuits Conference,
Zianbetov, E. ; Akre, J- M. ; Juillard, J.... - p. 1-4 , 2013
 
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