E-LIB Suche - Ergebnisse für: Canelas, António Manuel Lourenço

1

Introduction:

, In: Yield-Aware Analog IC Design and Optimization in Nanometer-scale Technologies,

Canelas, António Manuel Lourenço ; Guilherme, Jorge Manuel Correia ; Horta, Nuno Cavaco Gomes - p. 1-7 , 2020

Link: https://doi.org/10.1007/..

2

Analog IC Sizing Background:

, In: Yield-Aware Analog IC Design and Optimization in Nanometer-scale Technologies,

Canelas, António Manuel Lourenço ; Guilherme, Jorge Manuel Correia ; Horta, Nuno Cavaco Gomes - p. 9-64 , 2020

Link: https://doi.org/10.1007/..

3

Conclusion and Future Work:

, In: Yield-Aware Analog IC Design and Optimization in Nanometer-scale Technologies,

Canelas, António Manuel Lourenço ; Guilherme, Jorge Manuel Correia ; Horta, Nuno Cavaco Gomes - p. 225-230 , 2020

Link: https://doi.org/10.1007/..

4

Tests and Results:

, In: Yield-Aware Analog IC Design and Optimization in Nanometer-scale Technologies,

Canelas, António Manuel Lourenço ; Guilherme, Jorge Manuel Correia ; Horta, Nuno Cavaco Gomes - p. 179-224 , 2020

Link: https://doi.org/10.1007/..

5

AIDA-C Variation-Aware Circuit Synthesis Tool:

, In: Yield-Aware Analog IC Design and Optimization in Nanometer-scale Technologies,

Canelas, António Manuel Lourenço ; Guilherme, Jorge Manuel Correia ; Horta, Nuno Cavaco Gomes - p. 155-177 , 2020

Link: https://doi.org/10.1007/..

6

Yield Estimation Techniques Related Work:

, In: Yield-Aware Analog IC Design and Optimization in Nanometer-scale Technologies,

Canelas, António Manuel Lourenço ; Guilherme, Jorge Manuel Correia ; Horta, Nuno Cavaco Gomes - p. 65-95 , 2020

Link: https://doi.org/10.1007/..

7

Monte Carlo-Based Yield Estimation: New Methodology:

, In: Yield-Aware Analog IC Design and Optimization in Nanometer-scale Technologies,

Canelas, António Manuel Lourenço ; Guilherme, Jorge Manuel Correia ; Horta, Nuno Cavaco Gomes - p. 97-153 , 2020

Link: https://doi.org/10.1007/..

8

Yield-Aware Analog IC Design and Optimization in Nanometer-..:

Canelas, António Manuel Lourenço ; Guilherme, Jorge Manuel Correia ; Horta, Nuno Cavaco Gomes - 1st ed. 2020 . , 2020

Link: https://doi.org/10.1007/..

9

Hierarchical Yield-Aware Synthesis Methodology Covering Dev..:

Canelas, Antonio ; Passos, Fabio ; Lourenco, Nuno...
IEEE Access. 9 (2021) - p. 124152-124164 , 2021

Link: https://doi.org/10.1109/..

10

A new family of CMOS inverter-based OTAs for biomedical and..:

Póvoa, Ricardo ; Canelas, António ; Martins, Ricardo...
Integration. 71 (2020) - p. 38-48 , 2020

Link: https://doi.org/10.1016/..

11

FUZYE: A Fuzzy ${c}$ -Means Analog IC Yield Optimization Us..:

Canelas, Antonio ; Povoa, Ricardo ; Martins, Ricardo...
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 39 (2020) 1 - p. 1-13 , 2020

Link: https://doi.org/10.1109/..

12

Sub-μW Tow-Thomas based biquad filter with improved gain fo..:

Póvoa, Ricardo ; Arya, Richa ; Canelas, António...
Microelectronics Journal. 95 (2020) - p. 104675 , 2020

Link: https://doi.org/10.1016/..

13

Stochastic-based placement template generator for analog IC..:

Martins, Ricardo ; Lourenço, Nuno ; Canelas, António.
Integration. 58 (2017) - p. 485-495 , 2017

Link: https://doi.org/10.1016/..

14

Design and application of a CMOS active inductor at Ku band..:

Pandey, Mrinalinee ; Canelas, António ; Póvoa, Ricardo...
Integration. 55 (2016) - p. 330-340 , 2016

Link: https://doi.org/10.1016/..

15

AIDA: Layout-aware analog circuit-level sizing with in-loop..:

Lourenço, Nuno ; Martins, Ricardo ; Canelas, António..
Integration. 55 (2016) - p. 316-329 , 2016

Link: https://doi.org/10.1016/..