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1

Architecture optimization of SPAD integrated in 28 nm FD-SO..:

Issartel, D. ; Gao, S. ; Pittet, P....
Solid-State Electronics. 191 (2022) - p. 108297 , 2022

Link: https://doi.org/10.1016/..

2

Lowering the Dark Count Rate of SPAD Implemented in CMOS FD..:

, In: 2019 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS),

de Albuquerque, T. Chaves ; Issartel, D. ; Clerc, R.... - p. 1-4 , 2019

Link: https://doi.org/10.1109/..

3

3D Silicon Coincidence Avalanche Detector (3D-SiCAD) for ch..:

Vignetti, M.M. ; Calmon, F. ; Pittet, P....
Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment. 881 (2018) - p. 53-59 , 2018

Link: https://doi.org/10.1016/..

4

Preliminary simulation study of a coincidence Avalanche Pix..:

Vignetti, M.M. ; Calmon, F. ; Cellier, R....
Journal of Instrumentation. 10 (2015) 6 - p. C06007-C06007 , 2015

Link: https://doi.org/10.1088/..

5

Design guidelines for the integration of Geiger-mode avalan..:

Vignetti, M.M. ; Calmon, F. ; Cellier, R....
Microelectronics Journal. 46 (2015) 10 - p. 900-910 , 2015

Link: https://doi.org/10.1016/..

6

Architecture optimization of SPAD integrated in 28 nm FD-SO..:

Issartel, D ; Gao, S ; Pittet, P...
info:eu-repo/semantics/altIdentifier/doi/10.1016/j.sse.2022.108297. , 2022

Link: https://hal.science/hal-..

7

Architecture optimization of SPAD integrated in 28 nm FD-SO..:

Issartel, D ; Gao, S ; Pittet, P...
info:eu-repo/semantics/altIdentifier/doi/10.1016/j.sse.2022.108297. , 2022

Link: https://hal.science/hal-..

8

Architecture optimization of SPAD integrated in 28 nm FD-SO..:

Issartel, D ; Gao, S ; Pittet, P...
info:eu-repo/semantics/altIdentifier/doi/10.1016/j.sse.2022.108297. , 2022

Link: https://hal.science/hal-..

9

Architecture optimization of SPAD integrated in 28 nm FD-SO..:

Issartel, D ; Gao, S ; Pittet, P...
info:eu-repo/semantics/altIdentifier/doi/10.1016/j.sse.2022.108297. , 2022

Link: https://hal.science/hal-..

10

Architecture optimization of SPAD integrated in 28 nm FD-SO..:

Issartel, D ; Gao, S ; Pittet, P...
info:eu-repo/semantics/altIdentifier/doi/10.1016/j.sse.2022.108297. , 2022

Link: https://hal.science/hal-..

11

Architecture optimization of SPAD integrated in 28 nm FD-SO..:

Issartel, D ; Gao, S ; Pittet, P...
info:eu-repo/semantics/altIdentifier/doi/10.1016/j.sse.2022.108297. , 2022

Link: https://hal.science/hal-..

12

Specificity and origin of the stability of the sr isotopic ..:

CELLIER, R ; BERAIL, S ; BARRE, J...
1420-3049. , 2021

Link: https://oskar-bordeaux.f..

13

Lowering the Dark Count Rate of SPAD Implemented in CMOS FD..:

Chaves de Albuquerque, T ; Issartel, D ; Clerc, R...
info:eu-repo/semantics/altIdentifier/doi/10.1109/EUROSOI-ULIS45800.2019.9041916. , 2019

Link: https://hal.science/hal-..

14

Lowering the Dark Count Rate of SPAD Implemented in CMOS FD..:

Chaves de Albuquerque, T ; Issartel, D ; Clerc, R...
info:eu-repo/semantics/altIdentifier/doi/10.1109/EUROSOI-ULIS45800.2019.9041916. , 2019

Link: https://hal.science/hal-..

15

Lowering the Dark Count Rate of SPAD Implemented in CMOS FD..:

Chaves de Albuquerque, T ; Issartel, D ; Clerc, R...
info:eu-repo/semantics/altIdentifier/doi/10.1109/EUROSOI-ULIS45800.2019.9041916. , 2019

Link: https://hal.science/hal-..

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