E-LIB Suche - Ergebnisse für: Chenming Hu

1

Planning of takeoff/landing site location, dispatch route, ..:

Shuping, Fang ; Yu, Ru ; Chenming, Hu.
European Journal of Agronomy. 146 (2023) - p. 126814 , 2023

Link: https://doi.org/10.1016/..

2

Application of air energy heat pump in brood production of ..:

Chenming, Hu ; Han, Pen ; Li, Yang...
E3S Web of Conferences. 245 (2021) - p. 01036 , 2021

Link: https://doi.org/10.1051/..

3

Invited Tutorial:

, In: 2015 IEEE Workshop on Microelectronics and Electron Devices (WMED),

Chenming Hu ; Mansuri, Mozhgan - p. 1-2 , 2015

Link: https://doi.org/10.1109/..

4

Impact of on-chip interconnect frequency-dependent R(f)L(f)..:

Yu Cao ; Xuejue Huang ; Sylvester, D...
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 13 (2005) 1 - p. 158-162 , 2005

Link: https://doi.org/10.1109/..

5

Improved a priori interconnect predictions and technology e..:

Yu Cao ; Chenming Hu ; Xuejue Huang...
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 11 (2003) 1 - p. 3-14 , 2003

Link: https://doi.org/10.1109/..

6

Moore's law lives on [CMOS transistors]:

Leland Chang ; Yang-Kyu Choi ; Kedzierski, J....
IEEE Circuits and Devices Magazine. 19 (2003) 1 - p. 35-42 , 2003

Link: https://doi.org/10.1109/..

7

Spice up your MOSFET modeling:

Yu Cao ; Orshansky, M. ; Sato, T...
IEEE Circuits and Devices Magazine. 19 (2003) 4 - p. 17-23 , 2003

Link: https://doi.org/10.1109/..

8

Effective on-chip inductance modeling for multiple signal l..:

Yu Cao ; Xuejue Huang ; Chang, N.H....
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 10 (2002) 6 - p. 799-805 , 2002

Link: https://doi.org/10.1109/..

9

Improved MOSFET electron mobility model for advanced gate d..:

, In: 60th DRC. Conference Digest Device Research Conference,

Polishchuk, I. ; Kevin J. Yang ; Tsu-Jae King. - p. 75,76 , 2002

Link: https://doi.org/10.1109/..

10

BSIM model for circuit design using advanced technologies:

, In: 2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185),

Chenming Hu - p. 5,6,7,8,9,10 , 2001

Link: https://doi.org/10.1109/..

11

Impact of systematic spatial intra-chip gate length variabi..:

, In: IEEE/ACM International Conference on Computer Aided Design. ICCAD - 2000. IEEE/ACM Digest of Technical Papers (Cat. No.00CH37140),

Orshansky, M. ; Milor, L. ; Pinhong Chen.. - p. 62,63,64,65,66,67 , 2000

Link: https://doi.org/10.1109/..

12

Impact of Gate Microstructure on Complementary Metal-Oxide-..:

Yu, Bin ; Ju, Dong-Hyuk ; Kepler, Nick..
Japanese Journal of Applied Physics. 36 (1997) 9A - p. L1150 , 1997

Link: https://doi.org/10.1143/..

13

SOI (Silicon-On-Insulator) for High Speed Ultra Large Scale..:

Chenming Hu, Chenming Hu
Japanese Journal of Applied Physics. 33 (1994) 1S - p. 365 , 1994

Link: https://doi.org/10.1143/..

14

A 128K flash EEPROM using double polysilicon technology:

, In: 1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers,

Samachisa, G. ; Chien-Sheng Su ; Yu-Sheng Kao... - p. 76,77 , 1987

Link: https://doi.org/10.1109/..

15

Correlating the channel, substrate, gate and minority-carri..:

, In: 1983 IEEE International Solid-State Circuits Conference. Digest of Technical Papers,

Chenming Hu ; Tam, S. ; Fu-Chieh Hsu.. - p. 88,89 , 1983

Link: https://doi.org/10.1109/..