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Cherupally, Sai Kiran
5  Ergebnisse:
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1

A 28-nm 8-bit Floating-Point Tensor Core-Based Programmable..:

Venkataramanaiah, Shreyas Kolala ; Meng, Jian ; Suh, Han-Sok...
IEEE Journal of Solid-State Circuits.  58 (2023)  7 - p. 1885-1897 , 2023
Link: https://doi.org/10.1109/..
 
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2

A 28nm 8-bit Floating-Point Tensor Core based CNN Training ..:

, In: ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC),
Venkataramanaiah, Shreyas Kolala ; Meng, Jian ; Suh, Han-Sok... - p. 89-92 , 2022
Link: https://doi.org/10.1109/..
 
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3

A 1.23-GHz 16-kb Programmable and Generic Processing-in-SRA..:

, In: ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC),
Sridharan, Amitesh ; Angizi, Shaahin ; Cherupally, Sai Kiran... - p. 153-156 , 2022
Link: https://doi.org/10.1109/..
 
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4

A Smart Hardware Security Engine Combining Entropy Sources ..:

, In: 2019 IEEE Asian Solid-State Circuits Conference (A-SSCC),
Cherupally, Sai Kiran ; Yin, Shihui ; Kadetotad, Deepak... - p. 145-148 , 2019
Link: https://doi.org/10.1109/..
 
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5

Improving the accuracy and robustness of RRAM-based in-memo..:

Kiran Cherupally, Sai ; Meng, Jian ; Siraj Rakin, Adnan...
Semiconductor Science and Technology.  37 (2022)  3 - p. 034001 , 2022
Link: https://doi.org/10.1088/..
 
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