Choi, Jaeseung
345  Ergebnisse:
Personensuche X
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1

A 14nm 128Mb Embedded MRAM Macro achieved the Best Figure-O..:

, In: 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits),
 
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2

Snap-3D: A Constrained Placement-Driven Physical Design Met..:

Vanna-Iampikul, Pruek ; Shao, Chengjia ; Lu, Yi-Chen...
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.  42 (2023)  7 - p. 2331-2335 , 2023
 
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3

5-nm Low-Power SRAM Featuring Dual-Rail Architecture With V..:

Baeck, Sangyeop ; Lee, Inhak ; Tang, Hoyoung...
IEEE Solid-State Circuits Letters.  5 (2022)  - p. 50-53 , 2022
 
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4

A 32Mb Embedded Flash Memory based on 28nm with the best Ce..:

, In: 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits),
Shin, Hyunjin ; Won, Sangkyung ; Kim, Dohui... - p. 132-133 , 2022
 
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5

NtFuzz: Enabling Type-Aware Kernel Fuzzing on Windows with ..:

, In: 2021 IEEE Symposium on Security and Privacy (SP),
Choi, Jaeseung ; Kim, Kangsu ; Lee, Daejin. - p. 677-693 , 2021
 
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8

SMARTIAN : enhancing smart contract fuzzing with static ..:

, In: Proceedings of the 36th IEEE/ACM International Conference on Automated Software Engineering,
Choi, Jaeseung ; Kim, Doyeon ; Kim, Soomin... - p. 227-239 , 2021
 
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9

Grey-box concolic testing on binary code:

, In: Proceedings of the 41st International Conference on Software Engineering,
Choi, Jaeseung ; Jang, Joonun ; Han, Choongwoo. - p. 736-747 , 2019
 
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11

Eclipser:

Choi, Jaeseung ; Jang, Joonun ; Han, Choongwoo.
https://github.com/SoftSec-KAIST/Eclipser/releases/tag/v0.1.  , 2019
 
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12

Eclipser Artifact:

Choi, Jaeseung ; Jang, Joonun ; Han, Choongwoo.
https://github.com/SoftSec-KAIST/Eclipser-Artifact/releases/tag/v0.1.  , 2019
 
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