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Graeb, H.
43  Ergebnisse:
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1

Hierarchical Analog Power-Down Synthesis:

, In: 2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS),
Neuner, M. ; Graeb, H. - p. 1-4 , 2020
Link: https://doi.org/10.1109/..
 
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2

Pareto optimization of analog circuits considering variabil..:

Graeb, H. ; Mueller-Gritschneder, D. ; Schlichtmann, U.
International Journal of Circuit Theory and Applications.  37 (2009)  2 - p. 283-299 , 2009
Link: https://doi.org/10.1002/..
 
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3

Session details: Sizing, placement, planning and packaging:

, In: Proceedings of the Conference on Design, Automation and Test in Europe,
Graeb, H. ; Stroobandt, D. , 2009
Link: https://dl.acm.org/doi/1..
 
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4

Session details: Analogue layout synthesis - light at the e..:

, In: Proceedings of the Conference on Design, Automation and Test in Europe,
Graeb, H. , 2009
Link: https://dl.acm.org/doi/1..
 
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5

Analog layout synthesis : recent advances in topological..:

, In: Proceedings of the Conference on Design, Automation and Test in Europe,
Graeb, H. ; Balasa, F. ; Castro-Lopez, R.... - p. 274-279 , 2009
Link: https://dl.acm.org/doi/1..
 
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6

Session details: Analogue simulation, synthesis and verific..:

, In: Proceedings of the conference on Design, automation and test in Europe,
Kazmierski, T. ; Graeb, H. , 2008
Link: https://dl.acm.org/doi/1..
 
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7

Deterministic approaches to analog performance space explor..:

, In: Proceedings. 42nd Design Automation Conference, 2005.,
Mueller, D. ; Stehr, G. ; Graeb, H.. - p. 869,870,871,872,873,874 , 2005
Link: https://doi.org/10.1145/..
 
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8

Analog performance space exploration by Fourier-Motzkin eli..:

, In: Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design,
Stehr, G. ; Graeb, H. ; Antreich, K. - p. 847-854 , 2004
Link: https://dl.acm.org/doi/1..
 
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9

Performance trade-off analysis of analog circuits by normal..:

, In: Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451),
Stehr, G. ; Graeb, H. ; Antreich, K. - p. 958,959,960,961,962,963 , 2003
Link: https://doi.org/10.1145/..
 
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10

A Test Design Method for Floating Gate Defects (FGD) in Ana..:

, In: Proceedings of the conference on Design, automation and test in Europe,
Pronath, M. ; Graeb, H. ; Antreich, K. - p. 78 ff. , 2002
Link: https://dl.acm.org/doi/1..
 
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11

Analog Circuit Sizing Using Adaptive Worst-Case Parameter S..:

, In: Proceedings of the conference on Design, automation and test in Europe,
Schwencker, R. ; Schenkel, F. ; Pronath, M.. - p. 581 ff. , 2002
Link: https://dl.acm.org/doi/1..
 
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12

The sizing rules method for analog integrated circuit desig:

, In: Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design,
Graeb, H. ; Zizala, S. ; Eckmueller, J.. - p. 343-349 , 2001
Link: https://dl.acm.org/doi/1..
 
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13

A parametric test method for analog components in integrate..:

, In: Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design,
Pronath, M. ; Gloeckel, V. ; Graeb, H. - p. 557-561 , 2000
Link: https://dl.acm.org/doi/1..
 
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14

The generalized boundary curve — a common method for automa..:

, In: Proceedings of the conference on Design, automation and test in Europe,
Schwencker, R. ; Schenkel, F. ; Graeb, H.. - p. 42-47 , 2000
Link: https://dl.acm.org/doi/1..
 
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15

Automating the sizing of analog CMOS circuits by considerat..:

, In: Proceedings of the conference on Design, automation and test in Europe,
Schwencker, R. ; Eckmueller, J. ; Graeb, H.. - p. 69-es , 1999
Link: https://dl.acm.org/doi/1..
 
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