Grodstein, Joel
18  Ergebnisse:
Personensuche X
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3

RESTA : a robust and extendable symbolic timing analysis..:

, In: Proceedings of the 14th ACM Great Lakes symposium on VLSI,
Nepal, Kundan ; Song, Hui-Yuan ; Bahar, R. Iris. - p. 407-412 , 2004
 
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4

Power and CAD considerations for the 1.75mbyte, 1.2ghz L2 c..:

, In: Proceedings of the 12th ACM Great Lakes symposium on VLSI,
Grodstein, Joel ; Rayess, Rachid ; Truex, Tad... - p. 1-6 , 2002
 
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5

Logic decomposition during technology mapping:

, In: Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design,
 
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6

A delay model for logic synthesis of continuously-sized net..:

, In: Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design,
Grodstein, Joel ; Lehman, Eric ; Harkness, Heather.. - p. 458-462 , 1995
 
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7

Optimal latch mapping and retiming within a tree:

, In: Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design,
Grodstein, Joel ; Lehman, Eric ; Harkness, Heather.. - p. 242-245 , 1994
 
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8

Timing verification on a 1.2M-device full-custom CMOS desig:

, In: Proceedings of the 28th ACM/IEEE Design Automation Conference,
Pan, Jengwei ; Biro, Larry ; Grodstein, Joel.. - p. 551-554 , 1991
 
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11

Closing the loop on morphogenesis: a mathematical model of ..:

Joel Grodstein ; Patrick McMillen ; Michael Levin
https://www.frontiersin.org/articles/10.3389/fcell.2023.1087650/full.  , 2023
 
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