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Issenin, Ilya
16  Ergebnisse:
Personensuche X
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1

Compiler driven data layout optimization for regular/irregu..:

Cho, Doosan ; Pasricha, Sudeep ; Issenin, Ilya...
ACM SIGPLAN Notices.  43 (2008)  7 - p. 41-50 , 2008
Link: https://doi.org/10.1145/..
 
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2

A compiler-in-the-loop framework to explore horizontally pa..:

, In: Proceedings of the 2008 Asia and South Pacific Design Automation Conference,
Shrivastava, Aviral ; Issenin, Ilya ; Dutt, Nikil - p. 328-333 , 2008
Link: https://dl.acm.org/doi/1..
 
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3

Compiler driven data layout optimization for regular/irregu..:

, In: Proceedings of the 2008 ACM SIGPLAN-SIGBED conference on Languages, compilers, and tools for embedded systems,
Cho, Doosan ; Pasricha, Sudeep ; Issenin, Ilya... - p. 41-50 , 2008
Link: https://dl.acm.org/doi/1..
 
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4

A Compiler-in-the-Loop framework to explore Horizontally Pa..:

, In: 2008 Asia and South Pacific Design Automation Conference,
Shrivastava, Aviral ; Issenin, Ilya ; Dutt, Nikil - p. None , 2008
Link: https://doi.org/10.1109/..
 
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5

Software controlled memory layout reorganization for irregu..:

, In: Proceedings of the 2007 international conference on Compilers, architecture, and synthesis for embedded systems,
Cho, Doosan ; Issenin, Ilya ; Dutt, Nikil.. - p. 179-188 , 2007
Link: https://dl.acm.org/doi/1..
 
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6

DRDU: A data reuse analysis technique for efficient scratch..:

Issenin, Ilya ; Brockmeyer, Erik ; Miranda, Miguel.
ACM Transactions on Design Automation of Electronic Systems (TODAES).  12 (2007)  2 - p. 15-es , 2007
Link: https://dl.acm.org/doi/1..
 
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7

DRDU: A data reuse analysis technique for efficient scratch..:

Issenin, Ilya ; Brockmeyer, Erik ; Miranda, Miguel.
ACM Transactions on Design Automation of Electronic Systems.  12 (2007)  2 - p. 15 , 2007
Link: https://doi.org/10.1145/..
 
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8

Using FORAY Models to Enable MPSoC Memory Optimizations:

Issenin, Ilya ; Dutt, Nikil
International Journal of Parallel Programming.  36 (2007)  1 - p. 93-113 , 2007
Link: https://doi.org/10.1007/..
 
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9

Data reuse driven energy-aware MPSoC co-synthesis of memory..:

, In: Proceedings of the 4th international conference on Hardware/software codesign and system synthesis,
Issenin, Ilya ; Dutt, Nikil - p. 294-299 , 2006
Link: https://dl.acm.org/doi/1..
 
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10

Mitigating soft error failures for multimedia applications ..:

, In: Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems,
Lee, Kyoungwoo ; Shrivastava, Aviral ; Issenin, Ilya.. - p. 411-420 , 2006
Link: https://dl.acm.org/doi/1..
 
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11

Multiprocessor system-on-chip data reuse analysis for explo..:

, In: Proceedings of the 43rd annual Design Automation Conference,
Issenin, Ilya ; Brockmeyer, Erik ; Durinck, Bart. - p. 49-52 , 2006
Link: https://dl.acm.org/doi/1..
 
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12

FORAY-GEN : Automatic Generation of Affine Functions for..:

, In: Proceedings of the conference on Design, Automation and Test in Europe - Volume 2,
Issenin, Ilya ; Dutt, Nikil - p. 808-813 , 2005
Link: https://dl.acm.org/doi/1..
 
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13

Compilation techniques for energy reduction in horizontally..:

, In: Proceedings of the 2005 international conference on Compilers, architectures and synthesis for embedded systems,
Shrivastava, Aviral ; Issenin, Ilya ; Dutt, Nikil - p. 90-96 , 2005
Link: https://dl.acm.org/doi/1..
 
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14

Data Reuse Analysis Technique for Software-Controlled Memor..:

, In: Proceedings of the conference on Design, automation and test in Europe - Volume 1,
Issenin, Ilya ; Brockmeyer, Erik ; Miranda, Miguel. - p. 10202 ff. , 2004
Link: https://dl.acm.org/doi/1..
 
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15

FORAY-GEN: Automatic Generation of Affine Functions for Mem..:

Issenin, Ilya ; Dutt, Nikil
http://arxiv.org/abs/0710.4640.  , 2007
Link: http://arxiv.org/abs/071..
 
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