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Kajihara, Seiji
105  Ergebnisse:
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1

Area Efficient 0.009-mm$^{2}$ 28.1-ppm/$^{\circ}$C 11.3-MHz..:

Wijaya, Joshua Adiel ; Chen, Poki ; Pradhan, Lucky Kumar..
IEEE Transactions on Very Large Scale Integration (VLSI) Systems.  , 2024
Link: https://doi.org/10.1109/..
 
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2

On Correction of A Delay Value Using Ring-Oscillators for A..:

, In: 2022 IEEE 31st Asian Test Symposium (ATS),
Kato, Takaaki ; Miyake, Yousuke ; Kajihara, Seiji - p. 60-65 , 2022
Link: https://doi.org/10.1109/..
 
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3

A Practical Online Error Detection Method for Functional Sa..:

, In: 2022 IEEE International Test Conference (ITC),
Loki, Kazuya ; Kai, Yasuyuki ; Miyase, Kohei. - p. 63-72 , 2022
Link: https://doi.org/10.1109/..
 
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4

A 1-ps Bin Size 4.87-ps Resolution FPGA Time-to-Digital Con..:

Chen, Poki ; Wijaya, Joshua Adiel ; Kajihara, Seiji...
IEEE Access.  10 (2022)  - p. 126429-126439 , 2022
Link: https://doi.org/10.1109/..
 
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5

Effective Switching Probability Calculation to Locate Hotsp..:

, In: 2022 IEEE International Test Conference in Asia (ITC-Asia),
Utsunomiya, Taiki ; Hoshino, Ryu ; Miyase, Kohei... - p. 43-48 , 2022
Link: https://doi.org/10.1109/..
 
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6

On the Efficacy of Scan Chain Grouping for Mitigating IR-Dr..:

ZHANG, Yucong ; HOLST, Stefan ; WEN, Xiaoqing...
IEICE Transactions on Information and Systems.  E104.D (2021)  6 - p. 816-827 , 2021
Link: https://doi.org/10.1587/..
 
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7

Innovative Test Practices in Asia:

, In: 2020 IEEE 38th VLSI Test Symposium (VTS),
Iwasaki, Takeshi ; Aso, Masao ; Futami, Haruji... - p. 1-1 , 2020
Link: https://doi.org/10.1109/..
 
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8

On Evaluation for Aging-Tolerant Ring Oscillators with Acce..:

, In: 2020 IEEE 29th Asian Test Symposium (ATS),
Gondo, Masayuki ; Miyake, Yousuke ; Kato, Takaaki. - p. 1-6 , 2020
Link: https://doi.org/10.1109/..
 
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9

High-Precision PLL Delay Matrix With Overclocking and Doubl..:

Chen, Poki ; Lan, Jian-Ting ; Wang, Ruei-Ting...
IEEE Transactions on Very Large Scale Integration (VLSI) Systems.  28 (2020)  4 - p. 904-913 , 2020
Link: https://doi.org/10.1109/..
 
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10

On-Chip Delay Measurement for Degradation Detection And Its..:

, In: 2020 IEEE 26th International Symposium on On-Line Testing and Robust System Design (IOLTS),
Miyake, Yousuke ; Kato, Takaaki ; Kajihara, Seiji... - p. 1-6 , 2020
Link: https://doi.org/10.1109/..
 
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11

Path Delay Measurement with Correction for Temperature And ..:

, In: 2020 IEEE International Test Conference in Asia (ITC-Asia),
Miyake, Yousuke ; Kato, Takaaki ; Kajihara, Seiji - p. 112-117 , 2020
Link: https://doi.org/10.1109/..
 
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12

A Flexible Scan-in Power Control Method in Logic BIST and I..:

Kato, Takaaki ; Wang, Senling ; Sato, Yasuo..
IEEE Transactions on Emerging Topics in Computing.  8 (2020)  3 - p. 591-601 , 2020
Link: https://doi.org/10.1109/..
 
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13

On-Chip Test Clock Validation Using A Time-to-Digital Conve..:

, In: 2019 IEEE International Test Conference in Asia (ITC-Asia),
Miyake, Yousuke ; Kajihara, Seiji ; Chen, Poki - p. 157-162 , 2019
Link: https://doi.org/10.1109/..
 
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14

A Static Method for Analyzing Hotspot Distribution on the L..:

, In: 2019 IEEE International Test Conference in Asia (ITC-Asia),
Miyase, Kohei ; Kawano, Yudai ; Lu, Shyue-Kung.. - p. 73-78 , 2019
Link: https://doi.org/10.1109/..
 
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15

On-Chip Delay Measurement for In-Field Test of FPGAs:

, In: 2019 IEEE 24th Pacific Rim International Symposium on Dependable Computing (PRDC),
Miyake, Yousuke ; Sato, Yasuo ; Kajihara, Seiji - p. 130-1307 , 2019
Link: https://doi.org/10.1109/..
 
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