Kumar, Bodasingi Sai
3  Ergebnisse:
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A Low Error, Hardware Efficient Logarithmic Multiplier:

Harsha, L. Guna Sekhar Sai ; Jammu, Bhaskara Rao ; Bodasingi, Nalini..
Circuits, Systems, and Signal Processing.  41 (2021)  1 - p. 485-513 , 2021
 
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Hardware‐efficient approximate logarithmic division with im..:

Subhasri, Chitlu ; Jammu, Bhaskara Rao ; Guna Sekhar Sai Harsha, L...
International Journal of Circuit Theory and Applications.  49 (2020)  1 - p. 128-141 , 2020
 
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