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2020 IEEE 38th VLSI Test Symposium (VTS) ,
1
Automated Design For Yield Through Defect Tolerance:
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2020 IEEE International Test Conference (ITC) ,
2
Automating Design For Yield: Silicon Learning to Predictive..:
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ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC) ,
3
An All-Digital, VMAX-Compliant, and Stable Distributed Char..:
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ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC) ,
4
Min-Delay Margin/Error Detection and Correction for Flip-Fl..:
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Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition ,
10
Energy versus data integrity trade-offs in embedded high-de..:
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2012 Proceedings of the ESSCIRC (ESSCIRC) ,
13
A 500 fW/bit 14 fJ/bit-access 4kb standard-cell based sub-V..:
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Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI ,
14