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Nakata, Yohei
182  Ergebnisse:
Personensuche X
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1

Learning Intra-class Multimodal Distributions with Orthonor..:

, In: 2024 IEEE/CVF Winter Conference on Applications of Computer Vision (WACV),
Goto, Jumpei ; Nakata, Yohei ; Abe, Kiyofumi.. - p. 1859-1868 , 2024
Link: https://doi.org/10.1109/..
 
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2

MTTrans: Cross-domain Object Detection with Mean Teacher Tr..:

, In: Lecture Notes in Computer Science; Computer Vision – ECCV 2022,
Yu, Jinze ; Liu, Jiaming ; Wei, Xiaobao... - p. 629-645 , 2022
Link: https://doi.org/10.1007/..
 
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3

Virtualization: System-Level Fault Simulation of SRAM Error..:

, In: VLSI Design and Test for Systems Dependability,
Oho, Shigeru ; Ito, Yasuhiro ; Sugure, Yasuo... - p. 539-551 , 2018
Link: https://doi.org/10.1007/..
 
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4

A Low-Latency DMR Architecture with Fast Checkpoint Recover..:

, In: VLSI Design and Test for Systems Dependability,
Yoshimoto, Masahiko ; Matsukawa, Go ; Nakata, Yohei... - p. 709-718 , 2018
Link: https://doi.org/10.1007/..
 
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5

Design of SRAM Resilient Against Dynamic Voltage Variations:

, In: VLSI Design and Test for Systems Dependability,
Yoshimoto, Masahiko ; Nakata, Yohei ; Kimi, Yuta... - p. 579-591 , 2018
Link: https://doi.org/10.1007/..
 
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6

Effect of solvent evaporation temperature on the structure ..:

Okada, Arifumi ; Nakata, Yohei ; Minou, Kosuke..
Japanese Journal of Applied Physics.  55 (2016)  12 - p. 125001 , 2016
Link: https://doi.org/10.7567/..
 
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7

A Low-Latency DMR Architecture with Fast Checkpoint Recover..:

MATSUKAWA, Go ; NAKATA, Yohei ; SUGURE, Yasuo...
IEICE Transactions on Electronics.  E98.C (2015)  4 - p. 333-339 , 2015
Link: https://doi.org/10.1587/..
 
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8

A 40-nm Resilient Cache Memory for Dynamic Variation Tolera..:

NAKATA, Yohei ; KIMI, Yuta ; OKUMURA, Shunsuke...
IEICE Transactions on Electronics.  E97.C (2014)  4 - p. 332-341 , 2014
Link: https://doi.org/10.1587/..
 
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9

Reconfiguring Cache Associativity: Adaptive Cache Design fo..:

JUNG, Jinwook ; NAKATA, Yohei ; OKUMURA, Shunsuke..
IEICE Transactions on Electronics.  E96.C (2013)  4 - p. 528-537 , 2013
Link: https://doi.org/10.1587/..
 
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10

A Process-Variation-Adaptive Network-on-Chip with Variable-..:

NAKATA, Yohei ; KAWAGUCHI, Hiroshi ; YOSHIMOTO, Masahiko
IEICE Transactions on Electronics.  E95.C (2012)  4 - p. 523-533 , 2012
Link: https://doi.org/10.1587/..
 
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11

Low-energy block-level instantaneous comparison 7T SRAM for..:

Okumura, Shunsuke ; Nakata, Yohei ; Yanagida, Koji...
IEICE Electronics Express.  9 (2012)  6 - p. 470-476 , 2012
Link: https://doi.org/10.1587/..
 
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12

0.5-V 4-MB Variation-Aware Cache Architecture Using 7T/14T ..:

Nakata, Yohei ; Okumura, Shunsuke ; Kawaguchi, Hiroshi.
IPSJ Transactions on System LSI Design Methodology.  5 (2012)  - p. 32-43 , 2012
Link: https://doi.org/10.2197/..
 
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13

7T SRAM Enabling Low-Energy Instantaneous Block Copy and It..:

OKUMURA, Shunsuke ; KAGIYAMA, Yuki ; NAKATA, Yohei...
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences.  E94-A (2011)  12 - p. 2693-2700 , 2011
Link: https://doi.org/10.1587/..
 
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14

0.5-V operation variation-aware word-enhancing cache archit..:

, In: Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design,
Nakata, Yohei ; Okumura, Shunsuke ; Kawaguchi, Hiroshi. - p. 219-224 , 2010
Link: https://dl.acm.org/doi/1..
 
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15

Dynamical slowing down of polar nanoregion in relaxor-based..:

Nakata, Yohei ; Tsujimi, Yuhji ; Katsuraya, Kohei..
Applied Physics Letters.  89 (2006)  2 - p. , 2006
Link: https://doi.org/10.1063/..
 
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