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Neto, Horácio
184  Ergebnisse:
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1

Designing Deep Learning Models on FPGA with Multiple Hetero..:

Reis, Miguel ; Véstias, Mário ; Neto, Horácio
ACM Transactions on Reconfigurable Technology and Systems.  17 (2024)  1 - p. 1-30 , 2024
Link: https://doi.org/10.1145/..
 
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2

LiDAR 3D Object Detection in FPGA with Low Bitwidth Quantiz..:

, In: Applied Reconfigurable Computing. Architectures, Tools, and Applications; Lecture Notes in Computer Science,
Brum, Henrique ; Véstias, Mário ; Neto, Horácio - p. 90-105 , 2024
Link: https://doi.org/10.1007/..
 
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3

Hardware Accelerated Backprojection Algorithm on Xilinx Ult..:

, In: 2023 European Data Handling & Data Processing Conference (EDHPC),
Duarte, Rui Policarpo ; Cruz, Helena ; Vestias, Mario.. - p. 1-8 , 2023
Link: https://doi.org/10.23919..
 
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4

Energy-Efficient and Real-Time Wearable for Wellbeing-Monit..:

Frutuoso, Maria ; Neto, Horácio ; Véstias, Mário.
Algorithms.  16 (2023)  3 - p. 141 , 2023
Link: https://doi.org/10.3390/..
 
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5

A Review of Synthetic-Aperture Radar Image Formation Algori..:

Cruz, Helena ; Véstias, Mário ; Monteiro, José..
Remote Sensing.  14 (2022)  5 - p. 1258 , 2022
Link: https://doi.org/10.3390/..
 
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6

Efficient Design of Low Bitwidth Convolutional Neural Netwo..:

Véstias, Mário ; Duarte, Rui P. ; de Sousa, José T..
ACM Transactions on Reconfigurable Technology and Systems.  16 (2022)  1 - p. 1-36 , 2022
Link: https://doi.org/10.1145/..
 
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7

Decimal Multiplication in FPGA with a Novel Decimal Adder/S..:

Véstias, Mário ; Neto, Horácio
Algorithms.  14 (2021)  7 - p. 198 , 2021
Link: https://doi.org/10.3390/..
 
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8

Reconfigurable Accelerator for On-Board SAR Imaging Using t..:

, In: Applied Reconfigurable Computing. Architectures, Tools, and Applications; Lecture Notes in Computer Science,
Duarte, Rui P. ; Cruz, Helena ; Neto, Horácio - p. 392-401 , 2020
Link: https://doi.org/10.1007/..
 
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9

Correction to: Reconfigurable Accelerator for On-Board SAR ..:

, In: Applied Reconfigurable Computing. Architectures, Tools, and Applications; Lecture Notes in Computer Science,
Duarte, Rui P. ; Cruz, Helena ; Neto, Horácio - p. C1-C1 , 2020
Link: https://doi.org/10.1007/..
 
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10

Hybrid Dot-Product Calculation for Convolutional Neural Net..:

, In: 2019 29th International Conference on Field Programmable Logic and Applications (FPL),
Vestias, Mario P. ; Policarpo Duarte, Rui ; de Sousa, Jose T.. - p. 350-353 , 2019
Link: https://doi.org/10.1109/..
 
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11

Fault-Tolerant Architecture for On-board Dual-Core Syntheti..:

, In: Lecture Notes in Computer Science; Applied Reconfigurable Computing,
Cruz, Helena ; Duarte, Rui Policarpo ; Neto, Horácio - p. 3-16 , 2019
Link: https://doi.org/10.1007/..
 
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12

Improving the area of fast parallel decimal multipliers:

Véstias, Mário ; Neto, Horácio
Microprocessors and Microsystems.  61 (2018)  - p. 96-107 , 2018
Link: https://doi.org/10.1016/..
 
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13

Lite-CNN: A High-Performance Architecture to Execute CNNs i..:

, In: 2018 28th International Conference on Field Programmable Logic and Applications (FPL),
Vestias, Mario ; Policarpo Duarte, Rui ; de Sousa, Jose T.. - p. 399-3993 , 2018
Link: https://doi.org/10.1109/..
 
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14

Decimal addition on FPGA based on a mixed BCD/excess-6 repr..:

Neto, Horácio ; Véstias, Mário
Microprocessors and Microsystems.  55 (2017)  - p. 91-99 , 2017
Link: https://doi.org/10.1016/..
 
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15

Modeling and Simulation of a Many-core Architecture Using S..:

Silva, Ana Rita ; José, Wilson ; Neto, Horácio.
Procedia Technology.  17 (2014)  - p. 146-153 , 2014
Link: https://doi.org/10.1016/..
 
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