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Neto, Walter Lau
224  Ergebnisse:
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1

FlowTune: End-to-End Automatic Logic Optimization Explorati..:

Neto, Walter Lau ; Li, Yingjie ; Gaillardon, Pierre-Emmanuel.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.  42 (2023)  6 - p. 1912-1925 , 2023
Link: https://doi.org/10.1109/..
 
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2

A Two-Level Approximate Logic Synthesis Combining Cube Inse..:

Ammes, Gabriel ; Neto, Walter Lau ; Butzen, Paulo..
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.  41 (2022)  11 - p. 5126-5130 , 2022
Link: https://doi.org/10.1109/..
 
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3

Improving LUT-based optimization for ASICs:

, In: Proceedings of the 59th ACM/IEEE Design Automation Conference,
Neto, Walter Lau ; Amarú, Luca ; Possani, Vinicius... - p. 421-426 , 2022
Link: https://dl.acm.org/doi/1..
 
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4

Read your Circuit : Leveraging Word Embedding to Guide L..:

, In: Proceedings of the 26th Asia and South Pacific Design Automation Conference,
Neto, Walter Lau ; Moreira, Matheus Trevisan ; Amaru, Luca.. - p. 530-535 , 2021
Link: https://dl.acm.org/doi/1..
 
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5

A Scalable Mixed Synthesis Framework for Heterogeneous Netw..:

, In: 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE),
Austin, Max ; Temple, Scott ; Neto, Walter Lau... - p. 670-673 , 2020
Link: https://doi.org/10.23919..
 
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6

A scalable mixed synthesis framework for heterogeneous netw..:

, In: Proceedings of the 23rd Conference on Design, Automation and Test in Europe,
Austin, Max ; Temple, Scott ; Neto, Walter Lau... - p. 670-673 , 2020
Link: https://dl.acm.org/doi/1..
 
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7

LSOracle: a Logic Synthesis Framework Driven by Artificial ..:

, In: 2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD),
Neto, Walter Lau ; Austin, Max ; Temple, Scott... - p. 1-6 , 2019
Link: https://doi.org/10.1109/..
 
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8

A standard cell characterization flow for non-standard volt..:

, In: Proceedings of the 29th Symposium on Integrated Circuits and Systems Design: Chip on the Mountains,
Gibiluka, Matheus ; Moreira, Matheus Trevisan ; Neto, Walter Lau. - p. 1-6 , 2017
Link: https://dl.acm.org/doi/1..
 
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9

Sleep convention logic isochronic fork : an analysis:

, In: Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands,
Guazzelli, Ricardo A. ; Moreira, Matheus T. ; Neto, Walter Lau. - p. 103-109 , 2017
Link: https://dl.acm.org/doi/1..
 
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10

Scalable Sequential Optimization Under Observability Don't ..:

Marakkalage, Dewmini Sudara ; Testa, Eleonora ; Neto, Walter Lau...
http://arxiv.org/abs/2311.09967.  , 2023
Link: http://arxiv.org/abs/231..
 
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11

FlowTune: End-to-end Automatic Logic Optimization Explorati..:

Neto, Walter Lau ; Li, Yingjie ; Gaillardon, Pierre-Emmanuel.
http://arxiv.org/abs/2202.07721.  , 2022
Link: http://arxiv.org/abs/220..
 
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12

A Two-Level Approximate Logic Synthesis Combining Cube Inse..:

Ammes, Gabriel ; Neto, Walter Lau ; Butzen, Paulo..
http://arxiv.org/abs/2112.00621.  , 2021
Link: http://arxiv.org/abs/211..
 
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13

Logic Synthesis Meets Machine Learning: Trading Exactness f..:

Rai, Shubham ; Neto, Walter Lau ; Miyasaka, Yukio...
http://arxiv.org/abs/2012.02530.  , 2020
Link: http://arxiv.org/abs/201..
 
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14

Exact multi-level benchmark circuit generation for logic sy..:

Lau Neto, Walter
http://hdl.handle.net/10183/193157.  , 2018
Link: http://hdl.handle.net/10..
 
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15

Contributors:

, In: Endocrinology: Adult and Pediatric,
Aiello, Lloyd Paul ; Alatzoglou, Kyriaki S. ; Alexander, Erik K.... - p. iii-xvi , 2016
Link: https://doi.org/10.1016/..
 
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