Pierre David, Jean
~ 87000  Ergebnisse:
Personensuche X
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1

ASIP Accelerator for LUT-based Neural Networks Inference:

, In: 2022 20th IEEE Interregional NEWCAS Conference (NEWCAS),
 
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3

Sparq: A Custom RISC-V Vector Processor for Efficient Sub-B..:

, In: 2023 21st IEEE Interregional NEWCAS Conference (NEWCAS),
 
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4

FPGA-Based FDNE Models for the Accurate Real-Time Simulatio..:

, In: 2023 12th International Conference on Renewable Energy Research and Applications (ICRERA),
 
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6

A Low-Latency Reconfigurable Multistage Interconnection Net..:

, In: 2019 IEEE Canadian Conference of Electrical and Computer Engineering (CCECE),
 
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7

Automated Synthesis of Streaming Transfer Level Hardware De..:

Daigneault, Marc-Andre ; David, Jean Pierre
ACM Transactions on Reconfigurable Technology and Systems (TRETS).  11 (2018)  2 - p. 1-22 , 2018
 
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8

Automated Synthesis of Streaming Transfer Level Hardware De..:

Daigneault, Marc-Andre ; David, Jean Pierre
ACM Transactions on Reconfigurable Technology and Systems.  11 (2018)  2 - p. 1-22 , 2018
 
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10

Low latency and division free Gauss–Jordan solver in floati..:

David, Jean Pierre
Journal of Parallel and Distributed Computing.  106 (2017)  - p. 185-193 , 2017
 
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11

Fast description and synthesis of control-dominant circuits:

Daigneault, Marc-André ; David, Jean Pierre
Computers & Electrical Engineering.  40 (2014)  4 - p. 1199-1214 , 2014
 
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14

Inflammatory monocytes and Fcγ receptor IV on osteoclasts a..:

Seeling, Michaela ; Hillenhoff, Ulrike ; David, Jean Pierre...
Proceedings of the National Academy of Sciences.  110 (2013)  26 - p. 10729-10734 , 2013
 
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15

Self-Alignment Schemes for the Implementation of Addition-R..:

Ould-Bachir, Tarek ; David, Jean Pierre
ACM Transactions on Reconfigurable Technology and Systems.  6 (2013)  1 - p. 1-21 , 2013
 
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