Pierre Langlois, J. M.
~ 1600  Ergebnisse:
Personensuche X
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2

ASIP Accelerator for LUT-based Neural Networks Inference:

, In: 2022 20th IEEE Interregional NEWCAS Conference (NEWCAS),
 
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3

Designing customized microprocessors for fixed-point comput..:

, In: 2015 NASA/ESA Conference on Adaptive Hardware and Systems (AHS),
 
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5

Symbolic Analysis for Data Plane Programs Specialization:

Luinaud, Thomas ; Langlois, J. M. Pierre ; Savaria, Yvon
ACM Transactions on Architecture and Code Optimization.  20 (2022)  1 - p. 1-21 , 2022
 
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6

Design Principles for Packet Deparsers on FPGAs:

, In: The 2021 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays,
 
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7

Bridging the Gap: FPGAs as Programmable Switches:

, In: 2020 IEEE 21st International Conference on High Performance Switching and Routing (HPSR),
 
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8

Unleashing the Power of FPGAs as Programmable Switches:

, In: Proceedings of the 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays,
 
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9

An Energy-Efficient Accelerator Architecture with Serial Ac..:

, In: 2020 18th IEEE International New Circuits and Systems Conference (NEWCAS),
 
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11

Heterogeneous Distributed SRAM Configuration for Energy-Eff..:

, In: 2020 18th IEEE International New Circuits and Systems Conference (NEWCAS),
 
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12

POLYCiNN: Multiclass Binary Inference Engine using Convolut..:

, In: 2019 Conference on Design and Architectures for Signal and Image Processing (DASIP),
 
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14

SHIP: A Scalable High-Performance IPv6 Lookup Algorithm Tha..:

Stimpfling, Thibaut ; Belanger, Normand ; Langlois, J. M. Pierre.
IEEE/ACM Transactions on Networking (TON).  27 (2019)  4 - p. 1529-1542 , 2019
 
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