Ramos, Fabio Luis Livi
18  Ergebnisse:
Personensuche X
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1

AV1 Residual Syntax Elements Assessment and Efficient VLSI ..:

, In: 2023 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design (SBCCI),
 
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3

High-Throughput and Low-Power Architectures for the AV1 Ari..:

, In: 2021 34th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design (SBCCI),
 
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5

Low-power HEVC binarizer architecture for the CABAC block t..:

, In: Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands,
 
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6

Novel multiple bypass bins scheme for low-power UHD video p..:

, In: Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands,
 
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7

Low-power multi-size HEVC DCT architecture proposal for QFH..:

, In: Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands,
 
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8

Low-power hardware design for the HEVC binary arithmetic en..:

, In: Proceedings of the 29th Symposium on Integrated Circuits and Systems Design: Chip on the Mountains,
 
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9

Statistical Analysis of VVC Residual and Entropy Coding aim..:

, In: 2024 IEEE 15th Latin America Symposium on Circuits and Systems (LASCAS),
 
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10

Analysis of AV1 Arithmetic Decoder Design Space with a Nove..:

, In: 2023 IEEE 14th Latin America Symposium on Circuits and Systems (LASCAS),
 
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11

AV1 Arithmetic Encoder Design on Open-Source EDA:

Pereira Bitencourt, Tulio ; Livi Ramos, Fábio Luís ; Bampi, Sergio
Journal of Integrated Circuits and Systems.  17 (2022)  2 - p. 1-9 , 2022
 
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13

Low-power hardware design for the HEVC Binary Arithmetic En..:

, In: 2016 29th Symposium on Integrated Circuits and Systems Design (SBCCI),
 
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