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Rani S, Vasantha
645  Ergebnisse:
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1

Association analysis of FMR1 genetic variants and primary o..:

Komaravalli, Prasanna Latha ; Rani S, Vasantha ; Dalal, Ashwin.
European Journal of Medical Genetics.  63 (2020)  12 - p. 104081 , 2020
Link: https://doi.org/10.1016/..
 
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2

Common variants in NOD2 and IL23R are not associated with i..:

Mahurkar, Swapna ; Banerjee, Rupa ; Rani, Vasantha S...
Journal of Gastroenterology and Hepatology.  26 (2011)  4 - p. 694-699 , 2011
Link: https://doi.org/10.1111/..
 
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3

Design of an IP core for motion blur detection in fundus im..:

, In: 2023 International Conference on Bio Signals, Images, and Instrumentation (ICBSII),
George, Rohit Jacob ; Charaan, S ; Swathi, R. - p. 1-6 , 2023
Link: https://doi.org/10.1109/..
 
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4

Design of Logic Blocks for Efficient Architecture of FPGA:

, In: 2019 IEEE 1st International Conference on Energy, Systems and Information Processing (ICESIP),
Sudhanya, P. ; Rani, S.P. Joy Vasantha ; Lavanya, M.C. - p. 1-5 , 2019
Link: https://doi.org/10.1109/..
 
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5

Time domain modelled ADC BIST with ramp noise projection:

Sivakumar, M. Senthil ; Rani, S. P. Joy Vasantha
International Journal of Electronics.  106 (2019)  8 - p. 1127-1140 , 2019
Link: https://doi.org/10.1080/..
 
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6

Fast and Memory Compact Routing Algorithm for FPGA:

, In: 2019 IEEE 1st International Conference on Energy, Systems and Information Processing (ICESIP),
Sudhanya, P ; Rani, S. P Joy Vasantha ; Ali, S Divyath - p. 1-6 , 2019
Link: https://doi.org/10.1109/..
 
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7

An area efficient, high-frequency digital built-in self-tes..:

Sivakumar, M. Senthil ; Rani, S. P. Joy Vasantha
International Journal of Electronics.  105 (2018)  8 - p. 1319-1330 , 2018
Link: https://doi.org/10.1080/..
 
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8

Area and Speed Efficient Implementation of Symmetric FIR Di..:

Prasanna, S. C. ; Rani, S. P. Joy Vasantha
Circuits and Systems.  7 (2016)  8 - p. 1379-1391 , 2016
Link: https://doi.org/10.4236/..
 
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9

Zynq SoC-based IPs for Deep Learning Neural Networks:

, In: 2023 Winter Summit on Smart Computing and Networks (WiSSCoN),
M, Pranaav Jothi ; B, Manoj Kumar ; S, Subalakshmi Sarvani. - p. 1-5 , 2023
Link: https://doi.org/10.1109/..
 
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10

Voltage Controlled PFC Based Interleaved Synchronous Buck C..:

, In: 2019 IEEE 1st International Conference on Energy, Systems and Information Processing (ICESIP),
Rajamani, Thangam ; Vasantha, Rani S.P Joy - p. 1-7 , 2019
Link: https://doi.org/10.1109/..
 
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11

A VLSI implementation of an adaptive genetic algorithm proc..:

, In: 2017 Fourth International Conference on Signal Processing, Communication and Networking (ICSCN),
Jayashree, M. ; Ranjith, C. ; Vasantha Rani, S.P. Joy - p. 1-6 , 2017
Link: https://doi.org/10.1109/..
 
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12

Design of linear ramp generator for ADC:

, In: 2017 Fourth International Conference on Signal Processing, Communication and Networking (ICSCN),
Ashwini, S. ; Sivakumar, M. Senthil ; Vasantha Rani, S.P. Joy - p. 1-5 , 2017
Link: https://doi.org/10.1109/..
 
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13

Design of DCT Hardware Accelerator using FPGA for Medical I..:

, In: 2023 International Conference on Bio Signals, Images, and Instrumentation (ICBSII),
Swetha, V ; Evangeline Divya Sagayee, G ; Brintha, J S.. - p. 1-5 , 2023
Link: https://doi.org/10.1109/..
 
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14

Adaptive Particle Swarm Optimization Based Wire-length Mini..:

, In: New Trends in Computational Vision and Bio-inspired Computing,
Sudhanya, P. ; Joy Vasantha Rani, S. P. - p. 793-801 , 2020
Link: https://doi.org/10.1007/..
 
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15

An ADC BIST using on-chip ramp generation and digital ORA:

M, Senthil Sivakumar ; S P, Joy Vasantha Rani
Microelectronics Journal.  81 (2018)  - p. 8-15 , 2018
Link: https://doi.org/10.1016/..
 
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