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2024 International VLSI Symposium on Technology, Systems and Applications (VLSI TSA) ,
1
CMOS Scaling by Nanosheet Device Architectures and Backside..:
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2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) ,
2
PPA and Scaling Potential of Backside Power Options in N2 a..:
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2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) ,
4
PPAC of sheet-based CFET configurations for 4 track design ..:
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2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) ,
5
Backside PDN and 2.5D MIMCAP to Double Boost 2D and 3D ICs ..:
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2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) ,
6
Self-Heating in iN8–iN2 CMOS Logic Cells: Thermal Impact of..:
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2021 IEEE International Electron Devices Meeting (IEDM) ,
7
Extended Scale Length Theory Targeting Low-Dimensional FETs..:
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2020 IEEE Symposium on VLSI Technology ,
8
First Monolithic Integration of 3D Complementary FET (CFET)..:
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2020 4th IEEE Electron Devices Technology & Manufacturing Conference (EDTM) ,
9
Virtual Process-Based Spacer & Junction Optimization for an..:
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2019 IEEE International Electron Devices Meeting (IEDM) ,
10
Enabling Sub-5nm CMOS Technology Scaling Thinner and Taller:
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2019 IEEE International Electron Devices Meeting (IEDM) ,
11