Ich stimme zu, dass diese Seite Cookies verwende. Weitere Informationen finden Sie unter unseren Datenschutzerklärungen .
X
da Luz Reis, Ricardo Augusto
155  Ergebnisse:
Personensuche X
?
1

A Lifetime of Physical Design Automation and EDA Education ..:

, In: Proceedings of the 2022 International Symposium on Physical Design,
da Luz Reis, Ricardo Augusto - p. 137-138 , 2022
Link: https://dl.acm.org/doi/1..
 
?
2

Physical Design Optimization, From Past to Future:

, In: Proceedings of the 2022 International Symposium on Physical Design,
da Luz Reis, Ricardo Augusto - p. 145-148 , 2022
Link: https://dl.acm.org/doi/1..
 
?
3

EDA: Overview and Some Trends:

Da Luz Reis, Ricardo Augusto
Journal of Integrated Circuits and Systems.  17 (2022)  3 - p. 1-10 , 2022
Link: https://doi.org/10.29292..
 
?
4

Improving Simulated Annealing Placement by Applying Random ..:

, In: Proceedings of the 16th symposium on Integrated circuits and systems design,
Hentschke, Renato Fernandes ; da Luz Reis, Ricardo Augusto - p. 267 ff. , 2003
Link: https://dl.acm.org/doi/1..
 
?
5

A LEGAL Algorithm Following Global Routing:

, In: Proceedings of the 15th symposium on Integrated circuits and systems design,
Johann, Marcelo de Oliveira ; dos Santos, Glauco Borges Valim ; da Luz Reis, Ricardo Augusto - p. 271 ff. , 2002
Link: https://dl.acm.org/doi/1..
 
?
6

3D integrated circuit layout visualization using VRML:

Indrusiak, Leandro Soares ; da Luz Reis, Ricardo Augusto
Future Generation Computer Systems.  17 (2001)  5 - p. 503-511 , 2001
Link: https://doi.org/10.1016/..
 
?
7

Security Issues in the Design of Chips for IoT:

, In: 2020 IEEE 6th World Forum on Internet of Things (WF-IoT),
Micael de Oliveira Conceicao, Calebe ; Augusto da Luz Reis, Ricardo - p. 1-5 , 2020
Link: https://doi.org/10.1109/..
 
?
8

FinFET Inverter Designs: Behavior and Challenges of Process..:

De Moraes, Leonardo Barlette ; Zimpeck, Alexandra Lackmann ; Minhardt, Cristina.
Journal of Integrated Circuits and Systems.  16 (2021)  2 - p. 1-13 , 2021
Link: https://doi.org/10.29292..
 
?
9

Netlist Optimization by Gate Merging:

, In: 2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration (VLSI-SoC),
Oliveira Conceicao, Calebe Micael de ; Reis, Ricardo Augusto da Luz - p. 236-237 , 2019
Link: https://doi.org/10.1109/..
 
?
10

Asymmetric transistor sizing targeting radiation-hardened c..:

Lazzari, Cristiano ; Wirth, Gilson ; Kastensmidt, Fernanda Lima..
Electrical Engineering.  94 (2011)  1 - p. 11-18 , 2011
Link: https://doi.org/10.1007/..
 
?
11

LEGAL : An Algorithm for Simultaneous Net Routing:

, In: Proceedings of the 14th symposium on Integrated circuits and systems design,
Johann, Marcelo de Oliveira ; Reis, Ricardo Augusto da Luz - p. 180 ff. , 2001
Link: https://dl.acm.org/doi/1..
 
?
12

Systems architectural challenges for transitional and compa..:

Bampi, Sergio ; Susin, Altamiro Amadeu ; Reis, Ricardo Augusto da Luz
Seminário Integrado de Software e Hardware (36. : 2009 jul. 20-24 : Bento Gonçalves, RS). [Anais] [recurso eletrônico]. [Porto Alegre, RS] : SBC, 2009..  , 2009
Link: http://hdl.handle.net/10..
 
?
13

Systems architectural challenges for transitional and compa..:

Bampi, Sergio ; Susin, Altamiro Amadeu ; Reis, Ricardo Augusto da Luz
Seminário Integrado de Software e Hardware (36. : 2009 jul. 20-24 : Bento Gonçalves, RS). [Anais] [recurso eletrônico]. [Porto Alegre, RS] : SBC, 2009..  , 2009
Link: http://hdl.handle.net/10..
 
?
14

Maze routing steiner trees with delay versus wire length tr..:

Hentschke, Renato Fernandes ; Narasimhan, Jaganathan ; Johann, Marcelo de Oliveira.
IEEE transactions on very large scale integration (VLSI) systems. New York. Vol. 17, no 8 (Aug. 2009), p. 1073-1086.  , 2009
Link: http://hdl.handle.net/10..
 
?
15

Maze routing steiner trees with delay versus wire length tr..:

Hentschke, Renato Fernandes ; Narasimhan, Jaganathan ; Johann, Marcelo de Oliveira.
IEEE transactions on very large scale integration (VLSI) systems. New York. Vol. 17, no 8 (Aug. 2009), p. 1073-1086.  , 2009
Link: http://hdl.handle.net/10..
 
1-15