Hernández, César
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5

Sargantana: An Academic SoC RISC-V Processor in 22nm FDSOI ..:

, In: 2023 38th Conference on Design of Circuits and Integrated Systems (DCIS),
Doblas, Max ; Candon, Gerard ; Carril, Xavier... - p. 1-6 , 2023
 
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Vitruvius+: An Area-Efficient RISC-V Decoupled Vector Copro..:

Minervini, Francesco ; Palomar, Oscar ; Unsal, Osman...
ACM Transactions on Architecture and Code Optimization.  20 (2023)  2 - p. 1-25 , 2023
 
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Training of A Sensory Panel and its Correlation with Instru..:

Paredes, Julio Palmay- ; Paz-Yépez, Carolina ; Galarza, Grace Medina-...
Current Research in Nutrition and Food Science Journal.  11 (2023)  3 - p. 1374-1385 , 2023
 
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9

DVINO: A RISC-V Vector Processor Implemented in 65nm Techno..:

, In: 2022 37th Conference on Design of Circuits and Integrated Circuits (DCIS),
 
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