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Shimohigashi, Y.
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1

A 65ns CMOS DRAM with a twisted driveline sense amplifier:

, In: 1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers,
Shimohigashi, K. ; Kimura, K. ; Sakai, Y.... - p. 18,19 , 1987
Link: https://doi.org/10.1109/..
 
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2

A 16-levels/cell dynamic memory:

, In: 1985 IEEE International Solid-State Circuits Conference. Digest of Technical Papers,
Aoki, M. ; Nakagome, Y. ; Horiguchi, M... - p. 246,247 , 1985
Link: https://doi.org/10.1109/..
 
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3

A high-speed 16K-bit NMOS RAM:

, In: 1976 IEEE International Solid-State Circuits Conference. Digest of Technical Papers,
Itoh, K. ; Shimohigashi, K. ; Chiba, K... - p. 140,141 , 1976
Link: https://doi.org/10.1109/..
 
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