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2023 30th IEEE International Conference on Electronics, Circuits and Systems (ICECS) ,
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Layer-Minimization-Oriented GNR Area Routing:
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2020 IEEE REGION 10 CONFERENCE (TENCON) ,
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Construction of Obstacle-Avoiding Delay-Driven GNR Routing ..:
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2019 17th IEEE International New Circuits and Systems Conference (NEWCAS) ,
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Construction of Delay-Driven GNR Routing Tree:
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Proceedings of the 23rd ACM international conference on Great lakes symposium on VLSI ,
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Timing-constrained replacement using spare cells for design..:
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Proceedings of the 23rd ACM international conference on Great lakes symposium on VLSI ,
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Assignment of adjustable delay buffers for clock skew minim..:
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Proceedings of the great lakes symposium on VLSI ,
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Top-down-based symmetrical buffered clock routing:
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Proceedings of the great lakes symposium on VLSI ,
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Density-reduction-oriented layer assignment for rectangle e..:
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Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI ,
9
New optimal layer assignment for bus-oriented escape routin:
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Proceedings of the 2011 international symposium on Physical design ,
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Obstacle-aware length-matching bus routing:
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Proceedings of the 2010 Asia and South Pacific Design Automation Conference ,
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Obstacle-aware longest path using rectangular pattern detou..:
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Proceedings of the 47th Design Automation Conference ,
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Two-sided single-detour untangling for bus routing:
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Proceedings of the 20th symposium on Great lakes symposium on VLSI ,
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Resource-constrained timing-driven link insertion for criti..:
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Proceedings of the 20th symposium on Great lakes symposium on VLSI ,
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Ordered escape routing via routability-driven pin assignmen:
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Proceedings of the 2009 Asia and South Pacific Design Automation Conference ,
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IO connection assignment and RDL routing for flip-chip desi..:
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