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Licht, Johannes de Fine
33
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1
Co-design Hardware and Algorithm for Vector Search:
Jiang, Wenqi
;
Li, Shigang
;
Zhu, Yu
...
http://arxiv.org/abs/2306.11182. , 2023
Link:
http://arxiv.org/abs/230..
?
2
Streaming Task Graph Scheduling for Dataflow Architectures:
De Matteis, Tiziano
;
Gianinazzi, Lukas
;
Licht, Johannes de Fine
.
http://arxiv.org/abs/2306.02730. , 2023
Link:
http://arxiv.org/abs/230..
?
3
Fast Arbitrary Precision Floating Point on FPGA:
Licht, Johannes de Fine
;
Pattison, Christopher A
;
Ziogas, Alexandros Nikolaos
..
http://arxiv.org/abs/2204.06256. , 2022
Link:
http://arxiv.org/abs/220..
?
4
Temporal Vectorization: A Compiler Approach to Automatic Mu..:
Johnsen, Carl-Johannes
;
De Matteis, Tiziano
;
Ben-Nun, Tal
..
http://arxiv.org/abs/2210.04598. , 2022
Link:
http://arxiv.org/abs/221..
?
5
Python FPGA Programming with Data-Centric Multi-Level Desig:
Licht, Johannes de Fine
;
De Matteis, Tiziano
;
Ben-Nun, Tal
...
http://arxiv.org/abs/2212.13768. , 2022
Link:
http://arxiv.org/abs/221..
?
6
Productivity, Portability, Performance: Data-Centric Python:
Ziogas, Alexandros Nikolaos
;
Schneider, Timo
;
Ben-Nun, Tal
...
http://arxiv.org/abs/2107.00555. , 2021
Link:
http://arxiv.org/abs/210..
?
7
Lifting C Semantics for Dataflow Optimization:
Calotoiu, Alexandru
;
Ben-Nun, Tal
;
Kwasniewski, Grzegorz
...
http://arxiv.org/abs/2112.11879. , 2021
Link:
http://arxiv.org/abs/211..
?
8
Substream-Centric Maximum Matchings on FPGA:
Besta, Maciej
;
Fischer, Marc
;
Ben-Nun, Tal
...
http://arxiv.org/abs/2010.14684. , 2020
Link:
http://arxiv.org/abs/201..
?
9
StencilFlow: Mapping Large Stencil Programs to Distributed ..:
Licht, Johannes de Fine
;
Kuster, Andreas
;
De Matteis, Tiziano
...
http://arxiv.org/abs/2010.15218. , 2020
Link:
http://arxiv.org/abs/201..
?
10
FBLAS: Streaming Linear Algebra on FPGA:
De Matteis, Tiziano
;
Licht, Johannes de Fine
;
Hoefler, Torsten
http://arxiv.org/abs/1907.07929. , 2019
Link:
http://arxiv.org/abs/190..
?
11
Stateful Dataflow Multigraphs: A Data-Centric Model for Per..:
Ben-Nun, Tal
;
Licht, Johannes de Fine
;
Ziogas, Alexandros Nikolaos
..
http://arxiv.org/abs/1902.10345. , 2019
Link:
http://arxiv.org/abs/190..
?
12
Graph Processing on FPGAs: Taxonomy, Survey, Challenges:
Besta, Maciej
;
Stanojevic, Dimitri
;
Licht, Johannes De Fine
..
http://arxiv.org/abs/1903.06697. , 2019
Link:
http://arxiv.org/abs/190..
?
13
hlslib: Software Engineering for Hardware Design:
Licht, Johannes de Fine
;
Hoefler, Torsten
http://arxiv.org/abs/1910.04436. , 2019
Link:
http://arxiv.org/abs/191..
?
14
Flexible Communication Avoiding Matrix Multiplication on FP..:
Licht, Johannes de Fine
;
Kwasniewski, Grzegorz
;
Hoefler, Torsten
http://arxiv.org/abs/1912.06526. , 2019
Link:
http://arxiv.org/abs/191..
?
15
Streaming Message Interface: High-Performance Distributed M..:
De Matteis, Tiziano
;
Licht, Johannes de Fine
;
Beránek, Jakub
.
http://arxiv.org/abs/1909.03231. , 2019
Link:
http://arxiv.org/abs/190..
1-15