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A, Ranjani Aruna
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1

Design and optimization of a Bandgap Voltage Reference Circ..:

, In: 2024 International Conference on Social and Sustainable Innovations in Technology and Engineering (SASI-ITE),
Ranjani Aruna, A ; Tamil Selvan, H ; Kamala, J. - p. 356-360 , 2024
Link: https://doi.org/10.1109/..
 
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2

Design of Optimized and Energy Efficient 1-bit Comparator:

, In: 2023 International Conference on Smart Systems for applications in Electrical Sciences (ICSSES),
A, Ranjani Aruna ; J, Kamala ; K, Sahaana. - p. 1-5 , 2023
Link: https://doi.org/10.1109/..
 
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3

A novel expeditious switching circuit design for non volati..:

Aruna, A. Ranjani ; Kamala, J. ; Hanuman, C. R. S.
Analog Integrated Circuits and Signal Processing.  113 (2022)  3 - p. 331-342 , 2022
Link: https://doi.org/10.1007/..
 
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4

Analysis Optimum Sizing of 12 T PCSA for High Speed Soft Er..:

Aruna, A. Ranjani ; Kamala, J. ; Hanuman, C. R. S..
Journal of Electrical Engineering & Technology.  , 2022
Link: https://doi.org/10.1007/..
 
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5

A Novel Approach to Distributed Multi-Class SVM:

Govada, Aruna ; Ranjani, Shree ; Viswanathan, Aditi.
http://arxiv.org/abs/1512.01993.  , 2015
Link: http://arxiv.org/abs/151..
 
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