I agree that this site is using cookies. You can find further informations here.
X
Amaru, Luca
60  results:
Search for persons X
?
1

An RTL-to-GDSII Flow for Single Flux Quantum Circuits Based..:

Mlinar, Eric ; Whiteley, Stephen ; Belov, Anton...
IEEE Transactions on Applied Superconductivity.  33 (2023)  5 - p. 1-7 , 2023
Link: https://doi.org/10.1109/..
 
?
2

Improving LUT-based optimization for ASICs:

, In: Proceedings of the 59th ACM/IEEE Design Automation Conference,
Neto, Walter Lau ; Amarú, Luca ; Possani, Vinicius... - p. 421-426 , 2022
Link: https://dl.acm.org/doi/1..
 
?
3

Read your Circuit : Leveraging Word Embedding to Guide L..:

, In: Proceedings of the 26th Asia and South Pacific Design Automation Conference,
Neto, Walter Lau ; Moreira, Matheus Trevisan ; Amaru, Luca.. - p. 530-535 , 2021
Link: https://dl.acm.org/doi/1..
 
?
4

Extending Boolean Methods for Scalable Logic Synthesis:

Testa, Eleonora ; Amaru, Luca ; Soeken, Mathias...
IEEE Access.  8 (2020)  - p. 226828-226844 , 2020
Link: https://doi.org/10.1109/..
 
?
5

A Scalable Mixed Synthesis Framework for Heterogeneous Netw..:

, In: 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE),
Austin, Max ; Temple, Scott ; Neto, Walter Lau... - p. 670-673 , 2020
Link: https://doi.org/10.23919..
 
?
6

A logic synthesis toolbox for reducing the multiplicative c..:

, In: Proceedings of the 23rd Conference on Design, Automation and Test in Europe,
Testa, Eleonora ; Soeken, Mathias ; Riener, Heinz.. - p. 568-573 , 2020
Link: https://dl.acm.org/doi/1..
 
?
7

A scalable mixed synthesis framework for heterogeneous netw..:

, In: Proceedings of the 23rd Conference on Design, Automation and Test in Europe,
Austin, Max ; Temple, Scott ; Neto, Walter Lau... - p. 670-673 , 2020
Link: https://dl.acm.org/doi/1..
 
?
8

SAT-sweeping enhanced for logic synthesis:

, In: Proceedings of the 57th ACM/EDAC/IEEE Design Automation Conference,
Amarú, Luca ; Marranghello, Felipe ; Testa, Eleonora... - p. 1-6 , 2020
Link: https://dl.acm.org/doi/1..
 
?
9

SAT-Sweeping Enhanced for Logic Synthesis:

, In: 2020 57th ACM/IEEE Design Automation Conference (DAC),
Amaru, Luca ; Marranghello, Felipe ; Testa, Eleonora... - p. 1-6 , 2020
Link: https://doi.org/10.1109/..
 
?
10

A Logic Synthesis Toolbox for Reducing the Multiplicative C..:

, In: 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE),
Testa, Eleonora ; Soeken, Mathias ; Riener, Heinz.. - p. 568-573 , 2020
Link: https://doi.org/10.23919..
 
?
11

Scalable Generic Logic Synthesis : One Approach to Rule ..:

, In: Proceedings of the 56th Annual Design Automation Conference 2019,
Riener, Heinz ; Testa, Eleonora ; Haaswijk, Winston... - p. 1-6 , 2019
Link: https://dl.acm.org/doi/1..
 
?
12

LSOracle: a Logic Synthesis Framework Driven by Artificial ..:

, In: 2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD),
Neto, Walter Lau ; Austin, Max ; Temple, Scott... - p. 1-6 , 2019
Link: https://doi.org/10.1109/..
 
?
13

Reducing the Multiplicative Complexity in Logic Networks fo..:

, In: Proceedings of the 56th Annual Design Automation Conference 2019,
Testa, Eleonora ; Soeken, Mathias ; Amarù, Luca. - p. 1-6 , 2019
Link: https://dl.acm.org/doi/1..
 
?
14

Majority logic synthesis:

, In: Proceedings of the International Conference on Computer-Aided Design,
Amarù, Luca ; Testa, Eleonora ; Couceiro, Miguel... - p. 1-6 , 2018
Link: https://dl.acm.org/doi/1..
 
?
15

Canonical computation without canonical representation:

, In: Proceedings of the 55th Annual Design Automation Conference,
Mishchenko, Alan ; Brayton, Robert ; Petkovska, Ana... - p. 1-6 , 2018
Link: https://dl.acm.org/doi/1..
 
1-15