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Bhattacharya, Tinish
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1

Memristor-based hardware and algorithms for higher-order Ho..:

, In: 2024 IEEE International Symposium on Circuits and Systems (ISCAS),
Hizzani, Mohammad ; Heittmann, Arne ; Hutchinson, George... - p. 1-5 , 2024
Link: https://doi.org/10.1109/..
 
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2

Current Optimized Coset Coding for Efficient RRAM Programmi..:

Chakraborty, Supriya ; Bhattacharya, Tinish ; Suri, Manan
IEEE Transactions on Very Large Scale Integration (VLSI) Systems.  26 (2018)  5 - p. 1000-1004 , 2018
Link: https://doi.org/10.1109/..
 
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3

FPIA: Field-Programmable Ising Arrays with In-Memory Comput..:

Hutchinson, George Higgins ; Sifferman, Ethan ; Bhattacharya, Tinish.
http://arxiv.org/abs/2401.16202.  , 2024
Link: http://arxiv.org/abs/240..
 
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4

Memristor-based hardware and algorithms for higher-order Ho..:

Hizzani, Mohammad ; Heittmann, Arne ; Hutchinson, George...
http://arxiv.org/abs/2311.01171.  , 2023
Link: http://arxiv.org/abs/231..
 
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5

Low-Power (1T1N) Skyrmionic Synapses for Spiking Neuromorph..:

Bhattacharya, Tinish ; Li, Sai ; Huang, Yangqi...
http://arxiv.org/abs/1811.02343.  , 2018
Link: http://arxiv.org/abs/181..
 
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6

MASTISK:

Bhattacharya, Tinish ; Parmar, Vivek ; Suri, Manan
http://arxiv.org/abs/1804.00912.  , 2018
Link: http://arxiv.org/abs/180..
 
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7

Low-Power (1T1N) Skyrmionic Synapses for Spiking Neuromorph..:

Tinish Bhattacharya ; Sai Li ; Yangqi Huang...
https://ieeexplore.ieee.org/document/8598710/.  , 2019
Link: https://doi.org/10.1109/..
 
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