I agree that this site is using cookies. You can find further informations here.
X
Biagioni, Andrea
330  results:
Search for persons X
?
1

Outlines in hardware and software for new generations of ex..:

Ammendola, Roberto ; Biagioni, Andrea ; Chiarini, Carlotta...
EPJ Web of Conferences.  295 (2024)  - p. 10006 , 2024
Link: https://doi.org/10.1051/..
 
?
2

APEIRON: A Framework for High Level Programming of Dataflow..:

Ammendola, Roberto ; Biagioni, Andrea ; Chiarini, Carlotta...
EPJ Web of Conferences.  295 (2024)  - p. 11002 , 2024
Link: https://doi.org/10.1051/..
 
?
3

RED-SEA: Network Solution for Exascale Architectures:

, In: 2022 25th Euromicro Conference on Digital System Design (DSD),
Biagioni, Andrea ; Cretaro, Paolo ; Frezza, Ottorino... - p. 712-719 , 2022
Link: https://doi.org/10.1109/..
 
?
4

Towards EXtreme scale technologies and accelerators for euR..:

Agosta, Giovanni ; Aldinucci, Marco ; Alvarez, Carlos...
Microprocessors and Microsystems.  95 (2022)  - p. 104679 , 2022
Link: https://doi.org/10.1016/..
 
?
5

EuroEXA Custom Switch: an innovative FPGA-based system for ..:

Biagioni, Andrea ; Cretaro, Paolo ; Frezza, Ottorino...
EPJ Web of Conferences.  245 (2020)  - p. 09004 , 2020
Link: https://doi.org/10.1051/..
 
?
6

L0TP+: the Upgrade of the NA62 Level-0 Trigger Processor:

Ammendola, Roberto ; Biagioni, Andrea ; Ciardiello, Andrea...
EPJ Web of Conferences.  245 (2020)  - p. 01017 , 2020
Link: https://doi.org/10.1051/..
 
?
7

Next generation of Exascale-class systems: ExaNeSt project ..:

Katevenis, Manolis ; Ammendola, Roberto ; Biagioni, Andrea...
Microprocessors and Microsystems.  61 (2018)  - p. 58-71 , 2018
Link: https://doi.org/10.1016/..
 
?
8

Latest generation interconnect technologies in APEnet+ netw..:

Ammendola, Roberto ; Biagioni, Andrea ; Cretaro, Paolo...
Journal of Physics: Conference Series.  898 (2017)  - p. 082035 , 2017
Link: https://doi.org/10.1088/..
 
?
9

Power-Efficient Computing: Experiences from the COSA Projec:

Cesini, Daniele ; Corni, Elena ; Falabella, Antonio...
Scientific Programming.  2017 (2017)  - p. 1-14 , 2017
Link: https://doi.org/10.1155/..
 
?
10

Dynamic many-process applications on many-tile embedded sys..:

Paolucci, Pier Stanislao ; Biagioni, Andrea ; Murillo, Luis Gabriel...
Journal of Systems Architecture.  69 (2016)  - p. 29-53 , 2016
Link: https://doi.org/10.1016/..
 
?
11

ASIP acceleration for virtual-to-physical address translati..:

Ammendola, Roberto ; Biagioni, Andrea ; Frezza, Ottorino...
Future Generation Computer Systems.  53 (2015)  - p. 109-118 , 2015
Link: https://doi.org/10.1016/..
 
?
12

A multi-port 10GbE PCIe NIC featuring UDP offload and GPUDi..:

Ammendola, Roberto ; Biagioni, Andrea ; Frezza, Ottorino...
Journal of Physics: Conference Series.  664 (2015)  9 - p. 092002 , 2015
Link: https://doi.org/10.1088/..
 
?
13

A hierarchical watchdog mechanism for systemic fault awaren..:

Ammendola, Roberto ; Biagioni, Andrea ; Frezza, Ottorino...
Future Generation Computer Systems.  53 (2015)  - p. 90-99 , 2015
Link: https://doi.org/10.1016/..
 
?
14

NaNet: a low-latency NIC enabling GPU-based, real-time low ..:

Ammendola, Roberto ; Biagioni, Andrea ; Fantechi, Riccardo...
Journal of Physics: Conference Series.  513 (2014)  1 - p. 012018 , 2014
Link: https://doi.org/10.1088/..
 
?
15

Architectural improvements and 28 nm FPGA implementation of..:

Ammendola, Roberto ; Biagioni, Andrea ; Frezza, Ottorino...
Journal of Physics: Conference Series.  513 (2014)  5 - p. 052002 , 2014
Link: https://doi.org/10.1088/..
 
1-15