Byung Yong Choi
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1

25nm Programmable Virtual Source/Drain MOSFETs Using a Twin..:

, In: 2005 International Semiconductor Device Research Symposium,
Woo Young Choi ; Byung Yong Choi ; Ju Hee Park... - p. 388,389 , 2005
 
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2

Highly scalable and reliable 2-bit/cell SONOS memory transi..:

, In: Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005.,
Byung Yong Choi ; Dong Won Kim ; Choong-Ho Lee... - p. 118,119 , 2005
 
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3

80nm self-aligned complementary I-MOS using double sidewall..:

, In: IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004.,
Woo Young Choi ; Jae Young Song ; Byung Yong Choi... - p. 203,204,205,206 , 2004
 
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4

Nano-scale MOSFETs with programmable virtual source/drain:

, In: Conference Digest [Includes 'Late News Papers' volume] Device Research Conference, 2004. 62nd DRC.,
Byung Yong Choi ; Yong-Kyu Lee ; Woo Young Choi... - p. 213-214 vol.1 , 2004
 
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5

Programmable virtual source/drain MOSFETs:

, In: Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850),
Byung Yong Choi ; Yong Kyu Lee ; Woo Young Choi... - p. 229-232 , 2004
 
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6

Nanoscale silicon-oxide-nitride-oxide-silicon (SONOS) struc..:

, In: Proceedings. 7th International Conference on Solid-State and Integrated Circuits Technology, 2004.,
Byung-Gook Park ; Yong Kyu Lee ; Byung Yong Choi. - p. 679,680,681,682,683,684 , 2004
 
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7

Stable extraction of linearity (V/sub IP3/) for nanoscale R..:

Woo Young Choi ; Byung Yong Choi ; Dong-Soo Woo..
IEEE Microwave and Wireless Components Letters.  14 (2004)  2 - p. 83-85 , 2004
 
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8

A new fabrication method for self-aligned nanoscale I-MOS (..:

, In: Conference Digest [Includes 'Late News Papers' volume] Device Research Conference, 2004. 62nd DRC.,
Woo Young Choi ; Byung Yong Choi ; Dong-Soo Woo.. - p. 211-212 vol.1 , 2004
 
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9

A new linearity measurement algorithm for sub-micron microw..:

, In: Proceedings of the 20th IEEE Instrumentation Technology Conference (Cat. No.03CH37412),
Woo Young Choi ; Byung Yong Choi ; Dong-Soo Woo.. - p. 374,375,376 , 2003
 
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10

30 nm MOSFET development based on processes for nanotechnol..:

, In: ICONIP '02. Proceedings of the 9th International Conference on Neural Information Processing. Computational Intelligence for the E-Age (IEEE Cat. No.02EX575),
Jong Duk Lee ; Woo Young Choi ; Byung Yong Choi... - p. 251,252,253,254 , 2002
 
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12

Improving Read Disturb Characteristics by Self-Boosting Rea..:

Kang, Myounggon ; Park, Ki-Tae ; Song, Youngsun...
Japanese Journal of Applied Physics.  48 (2009)  4S - p. 04C062 , 2009
 
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14

Highly Manufacturable and Reliable 80-nm Gate Twin Silicon–..:

Park, Byung-Gook ; Choi, Byung Yong ; Choi, Woo Young...
Japanese Journal of Applied Physics.  44 (2005)  9L - p. L1214 , 2005
 
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15

Stable Extraction of Threshold Voltage Using Transconductan..:

Choi, Woo Young ; Woo, Dong-Soo ; Choi, Byung Yong..
Japanese Journal of Applied Physics.  43 (2004)  4S - p. 1759 , 2004
 
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