Cha, Sanguhn
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22.1 A 1.1V 16GB 640GB/s HBM2E DRAM with a Data-Bus Window-..:

, In: 2020 IEEE International Solid- State Circuits Conference - (ISSCC),
Oh, Chi-Sung ; Chun, Ki Chul ; Byun, Young-Yong... - p. 330-332 , 2020
 
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2

Defect Analysis and Cost-Effective Resilience Architecture ..:

, In: 2017 IEEE International Symposium on High Performance Computer Architecture (HPCA),
Cha, Sanguhn ; Seongil, O. ; Shin, Hyunsung... - p. 61-72 , 2017
 
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Self-correcting check bit generator of error correction cod..:

Cha, Sanguhn ; Yoon, Hongil
IEICE Electronics Express.  10 (2013)  6 - p. 20130103-20130103 , 2013
 
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High Speed, Minimal Area, and Low Power SEC Code for DRAMs ..:

, In: 2007 IEEE International Symposium on Circuits and Systems (ISCAS),
Cha, Sang-uhn ; Yoon, Hongil - p. None , 2007
 
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