E-LIB Suche - Ergebnisse für: Cheng-Wen Wu

1

Can IOT make semiconductor great again?:

, In: 2017 International Symposium on VLSI Design, Automation and Test (VLSI-DAT),

Cheng-Wen Wu - p. 1-1 , 2017

Link: https://doi.org/10.1109/..

2

Is IoT coming to the rescue of semiconductor?:

, In: 2016 21th IEEE European Test Symposium (ETS),

Cheng-Wen Wu - p. 1-1 , 2016

Link: https://doi.org/10.1109/..

3

On Improving Interconnect Defect Diagnosis Resolution and Y..:

Chun-Chuan Chi ; Bing-Yang Lin ; Cheng-Wen Wu...
IEEE Design & Test. 31 (2014) 4 - p. 16-26 , 2014

Link: https://doi.org/10.1109/..

4

A Mesh-Structured Scalable IPsec Processor:

Mao-Yin Wang ; Cheng-Wen Wu
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 18 (2010) 5 - p. 725-731 , 2010

Link: https://doi.org/10.1109/..

5

Economic Analysis of the HOY Wireless Test Methodology:

YuTsao Hsing ; LiMing Denq ; Chao-Hsun Chen.
IEEE Design & Test of Computers. 27 (2010) 3 - p. 20-30 , 2010

Link: https://doi.org/10.1109/..

6

Efficient built-in redundancy analysis for embedded memorie..:

Shyue-Kung Lu ; Yu-Chen Tsai ; Hsu, C.-H...
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 14 (2006) 1 - p. 34-42 , 2006

Link: https://doi.org/10.1109/..

7

A built-in self-repair design for RAMs with 2-D redundancy:

Jin-Fu Li ; Yeh, J.-C. ; Rei-Fu Huang.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 13 (2005) 6 - p. 742-745 , 2005

Link: https://doi.org/10.1109/..

8

Efficient and economical test equipment setup using procorr..:

Bin-Hong Lin ; Cheng-Wen Wu ; Hwei-Tsu Ann Luh
IEEE Design & Test of Computers. 21 (2004) 1 - p. 34-43 , 2004

Link: https://doi.org/10.1109/..

9

Opportunities with the open architecture test system:

, In: ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753),

Hatayama, K. ; Rajsuman, R. ; Cheng-Wen Wu... - p. 334-334 , 2004

Link: https://doi.org/10.1109/..

10

Cellular-array modular multiplier for fast RSA public-key c..:

Jin-Hua Hong ; Cheng-Wen Wu
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 11 (2003) 3 - p. 474-484 , 2003

Link: https://doi.org/10.1109/..

11

Efficient FFT network testing and diagnosis schemes:

Jin-Fu Li ; Cheng-Wen Wu
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 10 (2002) 3 - p. 267-278 , 2002

Link: https://doi.org/10.1109/..

12

Simulation-based test algorithm generation and port schedul..:

, In: Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232),

Chi-Feng Wu ; Chih-Tsun Huang ; Kuo-Liang Cheng.. - p. 301,302,303,304,305,306 , 2001

Link: https://doi.org/10.1145/..

13

Unified VLSI systolic array design for LZ data compression:

Shih-Arn Hwang ; Cheng-Wen Wu
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 9 (2001) 4 - p. 489-499 , 2001

Link: https://doi.org/10.1109/..

14

Hierarchical system test by an IEEE 1149.5 MTM-bus slave-mo..:

Jin-Hua Hong ; Chung-Hung Tsai ; Cheng-Wen Wu
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 8 (2000) 5 - p. 503-516 , 2000

Link: https://doi.org/10.1109/..

15

A programmable BIST core for embedded DRAM:

Chih-Tsun Huang ; Jing-Reng Huang ; Chi-Feng Wu..
IEEE Design & Test of Computers. 16 (1999) 1 - p. 59-70 , 1999

Link: https://doi.org/10.1109/..