E-LIB Suche - Ergebnisse für: Chiarella, T.

1

Towards Improved Nanosheet-Based Complementary Field Effect..:

, In: 2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM),

Chiarella, T. ; Matagne, P. ; Mertens, H.... - p. 1-3 , 2024

Link: https://doi.org/10.1109/..

2

3D Stacked Devices and MOL Innovations for Post-Nanosheet C..:

, In: 2023 International Electron Devices Meeting (IEDM),

Horiguchi, N. ; Mertens, H. ; Chiarella, T.... - p. 1-4 , 2023

Link: https://doi.org/10.1109/..

3

Nanosheet-based Complementary Field-Effect Transistors (CFE..:

, In: 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits),

Mertens, H. ; Hosseini, M. ; Chiarella, T.... - p. 1-2 , 2023

Link: https://doi.org/10.23919..

4

Buried Power Rail Integration with Si FinFETs for CMOS Scal..:

, In: 2020 IEEE Symposium on VLSI Technology,

Gupta, A. ; Mertens, H. ; Tao, Z.... - p. 1-2 , 2020

Link: https://doi.org/10.1109/..

5

First Monolithic Integration of 3D Complementary FET (CFET)..:

, In: 2020 IEEE Symposium on VLSI Technology,

Subramanian, S. ; Hosseini, M. ; Chiarella, T.... - p. 1-2 , 2020

Link: https://doi.org/10.1109/..

6

3D-carrier Profiling and Parasitic Resistance Analysis in V..:

, In: 2019 IEEE International Electron Devices Meeting (IEDM),

Eyben, P. ; Machillot, J. ; Kim, M.... - p. 11.3.1-11.3.4 , 2019

Link: https://doi.org/10.1109/..

7

Origin of the low-frequency noise in n-channel FinFETs:

Theodorou, C.G. ; Fasarakis, N. ; Hoffman, T....
Solid-State Electronics. 82 (2013) - p. 21-24 , 2013

Link: https://doi.org/10.1016/..

8

Charge based DC compact modeling of bulk FinFET transistor:

Cerdeira, A. ; Garduño, I. ; Tinoco, J....
Solid-State Electronics. 87 (2013) - p. 11-16 , 2013

Link: https://doi.org/10.1016/..

9

Flicker noise in n-channel nanoscale tri-gate fin-shaped fi..:

Theodorou, C. G. ; Fasarakis, N. ; Hoffman, T....
Applied Physics Letters. 101 (2012) 24 - p. , 2012

Link: https://doi.org/10.1063/..

10

Ultrathin EOT high-κ/metal gate devices for future technolo..:

Ragnarsson, L.-Å. ; Chiarella, T. ; Togo, M....
Microelectronic Engineering. 88 (2011) 7 - p. 1317-1322 , 2011

Link: https://doi.org/10.1016/..

11

Dopant and carrier profiling in FinFET-based devices with s..:

, In: 2010 Symposium on VLSI Technology,

Mody, J. ; Kambham, A.K. ; Zschatzsch, G.... - p. 195-196 , 2010

Link: https://doi.org/10.1109/..

12

Benchmarking SOI and bulk FinFET alternatives for PLANAR CM..:

Chiarella, T. ; Witters, L. ; Mercha, A....
Solid-State Electronics. 54 (2010) 9 - p. 855-860 , 2010

Link: https://doi.org/10.1016/..

13

Superior N- and P-MOSFET scalability using carbon co-implan..:

Augendre, E. ; Pawlak, B.J. ; Kubicek, S....
Solid-State Electronics. 51 (2007) 11-12 - p. 1432-1436 , 2007

Link: https://doi.org/10.1016/..

14

Addressing Key Concerns for Implementation of Ni FUSI into ..:

, In: 2007 IEEE Symposium on VLSI Technology,

Shickova, A. ; Lauwers, A. ; Zahid, M.... - p. None , 2007

Link: https://doi.org/10.1109/..

15

Strain enhanced FUSI/HfSiON Technology with optimized CMOS ..:

, In: 2007 IEEE Symposium on VLSI Technology,

Veloso, A. ; Arnauts, S. ; Loo, R.... - p. None , 2007

Link: https://doi.org/10.1109/..