Chien, Cheng-An
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1

Real-Time 3D Depth Generation for Stereoscopic Video Applic..:

Jian, Guo-An ; Chien, Cheng-An ; Chen, Peng-Sheng.
Journal of Signal Processing Systems.  72 (2012)  1 - p. 17-33 , 2012
 
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2

A Verification-Aware Design Methodology for Thread Pipelini..:

JIAN, Guo-An ; CHIEN, Cheng-An ; CHEN, Peng-Sheng.
IEICE Transactions on Information and Systems.  E95.D (2012)  10 - p. 2505-2513 , 2012
 
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3

A low-power management technique for high-performance domin..:

, In: Proceedings of the 16th Asia and South Pacific Design Automation Conference,
 
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4

A H.264/MPEG-2 dual mode video decoder chip supporting temp..:

, In: Proceedings of the 16th Asia and South Pacific Design Automation Conference,
 
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5

Dual-phase pipeline circuit design automation with a built-..:

, In: Proceedings of the 16th Asia and South Pacific Design Automation Conference,
 
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6

A dynamic quality-scalable H.264 video encoder chip:

, In: Proceedings of the 2009 Asia and South Pacific Design Automation Conference,
Chang, Hsiu-Cheng ; Yang, Yao-Chang ; Chen, Jia-Wei... - p. 125-126 , 2009
 
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7

A 252Kgates/4.9Kbytes SRAM/71mW multistandard video decoder..:

Chien, Chih-Da ; Chien, Cheng-An ; Chu, Jui-Chin..
ACM Transactions on Design Automation of Electronic Systems (TODAES).  14 (2009)  1 - p. 1-17 , 2009
 
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8

A 252Kgates/4.9Kbytes SRAM/71mW multistandard video decoder..:

Chien, Chih-Da ; Chien, Cheng-An ; Chu, Jui-Chin..
ACM Transactions on Design Automation of Electronic Systems.  14 (2009)  1 - p. 1-17 , 2009
 
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13

An 8b-Precision 8-Mb STT-MRAM Near-Memory-Compute Macro Usi..:

You, De-Qi ; Chiu, Yen-Cheng ; Khwa, Win-San...
IEEE Journal of Solid-State Circuits.  59 (2024)  1 - p. 219-230 , 2024
 
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