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Choi, Jaehyouk
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1

10.5 A 76 fsrms- Jitter and -65dBc- Fractional-Spur Fractio..:

, In: 2024 IEEE International Solid-State Circuits Conference (ISSCC),
Shin, Yuhwan ; Lee, Junseok ; Kim, Juyeop.. - p. 196-198 , 2024
Link: https://doi.org/10.1109/..
 
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2

Maize‐derived zein/acrylic hybrid emulsion for superior ski..:

Kang, Min Yeong ; Choi, Jaehyouk ; Shin, Seunghan.
Journal of Applied Polymer Science.  141 (2024)  24 - p. , 2024
Link: https://doi.org/10.1002/..
 
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3

A 12.24-GHz MDLL With a 102-Multiplication Factor Using a P..:

Cho, Yoonseo ; Lee, Jeonghyun ; Park, Suneui..
IEEE Journal of Solid-State Circuits.  , 2024
Link: https://doi.org/10.1109/..
 
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4

A 45-fsrms-Jitter, 144-to-162-GHz D-Band Frequency Synthesi..:

, In: 2024 IEEE Radio Frequency Integrated Circuits Symposium (RFIC),
Jung, Seohee ; Kim, Jaeho ; Bang, Jooeun. - p. 199-202 , 2024
Link: https://doi.org/10.1109/..
 
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5

10.2 A 5.5μs-Calibration-Time, Low-Jitter, and Compact-Area..:

, In: 2024 IEEE International Solid-State Circuits Conference (ISSCC),
Jang, Seheon ; Chae, Munjae ; Park, Hangi.. - p. 190-192 , 2024
Link: https://doi.org/10.1109/..
 
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6

A 12.8–15.0-GHz Low-Jitter Fractional-N Subsampling PLL Usi..:

Kim, Juyeop ; Jo, Yongwoo ; Park, Hangi...
IEEE Journal of Solid-State Circuits.  59 (2024)  2 - p. 424-434 , 2024
Link: https://doi.org/10.1109/..
 
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7

A Digital-PLL-Based Quadrature Clock Generator for a Low-Po..:

Shin, Yuhwan ; Jo, Yongwoo ; Kim, Juyeop...
IEEE Journal of Solid-State Circuits.  , 2024
Link: https://doi.org/10.1109/..
 
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8

28.5 A 900µW, 1-4GHz Input-Jitter-Filtering Digital-PLL-Bas..:

, In: 2023 IEEE International Solid- State Circuits Conference (ISSCC),
Shin, Yuhwan ; Jo, Yongwoo ; Kim, Juyeop... - p. 408-410 , 2023
Link: https://doi.org/10.1109/..
 
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9

A 122fsrms-Jitter and −60dBc-Reference-Spur 12.24GHz MDLL w..:

, In: 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits),
Cho, Yoonseo ; Lee, Jeonghyun ; Park, Suneui.. - p. 1-2 , 2023
Link: https://doi.org/10.23919..
 
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10

A Wideband LO Generator for 5G FR1 Bands Using a Single LC-..:

Jo, Yongwoo ; Kim, Juyeop ; Shin, Yuhwan...
IEEE Journal of Solid-State Circuits.  58 (2023)  12 - p. 3338-3350 , 2023
Link: https://doi.org/10.1109/..
 
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11

24.2 A 264-to-287GHz, −2.5dBm Output Power, and −92dBc/Hz 1..:

, In: 2023 IEEE International Solid- State Circuits Conference (ISSCC),
Moon, Byeong-Taek ; Lee, Sang-Gug ; Choi, Jaehyouk - p. 364-366 , 2023
Link: https://doi.org/10.1109/..
 
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12

A Sub-50-fs RMS Jitter, 103.5-GHz Fundamental-Sampling PLL ..:

Bang, Jooeun ; Jung, Seohee ; Kim, Jaeho..
IEEE Solid-State Circuits Letters.  6 (2023)  - p. 201-204 , 2023
Link: https://doi.org/10.1109/..
 
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13

4.6 A $47\text{fs}_{\text{rms}}$-Jitter and 26.6mW 103.5GHz..:

, In: 2023 IEEE International Solid- State Circuits Conference (ISSCC),
Bang, Jooeun ; Kim, Jaeho ; Jung, Seohee.. - p. 84-86 , 2023
Link: https://doi.org/10.1109/..
 
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14

A 0.009mm2, 6.5mW, 6.2b-ENOB 2.5GS/s Flash-and-VCO-Based Su..:

, In: 2023 IEEE Custom Integrated Circuits Conference (CICC),
Lee, Jeonghyun ; Cho, Yoonseo ; Kim, Jintae. - p. 1-2 , 2023
Link: https://doi.org/10.1109/..
 
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15

A 135fsrms-Jitter 0.6-to-7.7GHz LO Generator Using a Single..:

, In: 2023 IEEE International Solid- State Circuits Conference (ISSCC),
Jo, Yongwoo ; Kim, Juyeop ; Shin, Yuhwan... - p. 1-3 , 2023
Link: https://doi.org/10.1109/..
 
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