E-LIB Suche - Ergebnisse für: Daniel Gil-Tomas

1

A Hybrid Technique Based on ECC and Hardened Cells for Tole..:

Gil-Tomás, Daniel ; Saiz-Adalid, Luis J. ; Gracia-Morán, Joaquín..
IEEE Access. 12 (2024) - p. 70662-70675 , 2024

2

A Proposal of an ECC-based Adaptive Fault-Tolerant Mechanis..:

Gracia-Morán, Joaquín ; Saiz-Adalid, Luis-J. ; Baraza-Calvo, J.-Carlos..
IEEE Latin America Transactions. 22 (2024) 5 - p. 418-427 , 2024

Link: https://doi.org/10.1109/..

3

Reducing the Overhead of BCH Codes: New Double Error Correc..:

Saiz-Adalid, Luis-J. ; Gracia-Morán, Joaquín ; Gil-Tomás, Daniel..
Electronics. 9 (2020) 11 - p. 1897 , 2020

Link: https://doi.org/10.3390/..

4

Proposal of an Adaptive Fault Tolerance Mechanism to Tolera..:

Baraza-Calvo, J.-Carlos ; Gracia-Morán, Joaquín ; Saiz-Adalid, Luis-J...
Electronics. 9 (2020) 12 - p. 2074 , 2020

Link: https://doi.org/10.3390/..

5

Ultrafast Codes for Multiple Adjacent Error Correction and ..:

Saiz-Adalid, Luis-J. ; Gracia-Moran, Joaquin ; Gil-Tomas, Daniel..
IEEE Access. 7 (2019) - p. 151131-151143 , 2019

Link: https://doi.org/10.1109/..

6

Improving Error Correction Codes for Multiple-Cell Upsets i..:

Gracia-Moran, Joaquin ; Saiz-Adalid, Luis J. ; Gil-Tomas, Daniel.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 26 (2018) 10 - p. 2132-2142 , 2018

Link: https://doi.org/10.1109/..

7

Ultrafast Single Error Correction Codes for Protecting Proc..:

, In: 2015 11th European Dependable Computing Conference (EDCC),

Saiz-Adalid, Luis-J. ; Gil, Pedro ; Gracia-Moran, Joaquin.. - p. 144-154 , 2015

Link: https://doi.org/10.1109/..

8

Analyzing the Impact of Intermittent Faults on Microprocess..:

Gil-Tomas, Daniel ; Gracia-Moran, Joaquin ; Baraza-Calvo, J.-Carlos..
IEEE Design & Test of Computers. 29 (2012) 6 - p. 66-73 , 2012

Link: https://doi.org/10.1109/..

9

Studying the effects of intermittent faults on a microcontr..:

Gil-Tomás, Daniel ; Gracia-Morán, Joaquín ; Baraza-Calvo, J.-Carlos..
Microelectronics Reliability. 52 (2012) 11 - p. 2837-2846 , 2012

Link: https://doi.org/10.1016/..

10

Reducing the Overhead of BCH Codes: New Double Error Correc..:

Luis-J. Saiz-Adalid ; Joaquín Gracia-Morán ; Daniel Gil-Tomás..
Computer Science & Engineering. , 2020

Link: https://doi.org/10.3390/..

11

Reducing the Overhead of BCH Codes: New Double Error Correc..:

Luis-J. Saiz-Adalid ; Joaquín Gracia-Morán ; Daniel Gil-Tomás..
https://www.mdpi.com/2079-9292/9/11/1897. , 2020

Link: https://doi.org/10.3390/..

12

Proposal of an Adaptive Fault Tolerance Mechanism to Tolera..:

J.-Carlos Baraza-Calvo ; Joaquín Gracia-Morán ; Luis-J. Saiz-Adalid..
Computer Science & Engineering. , 2020

Link: https://doi.org/10.3390/..

13

Proposal of an Adaptive Fault Tolerance Mechanism to Tolera..:

J.-Carlos Baraza-Calvo ; Joaquín Gracia-Morán ; Luis-J. Saiz-Adalid..
https://www.mdpi.com/2079-9292/9/12/2074. , 2020

Link: https://doi.org/10.3390/..

14

Ultrafast Codes for Multiple Adjacent Error Correction and ..:

Luis-J. Saiz-Adalid ; Joaquin Gracia-Moran ; Daniel Gil-Tomas..
https://ieeexplore.ieee.org/document/8868073/. , 2019

Link: https://doi.org/10.1109/..

15

Design, Implementation and Evaluation of a Low Redundant Er..:

Gracia-Morán, Joaquín ; Saiz Adalid, Luis J. ; Baraza Calvo, Juan Carlos..
IEEE Latin America Transactions. 19 (2021) 11 - p. 1903-1911 , 2021

Link: https://doi.org/10.1109/..