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Doblas, Max
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1

GenArchBench: A genomics benchmark suite for arm HPC proces..:

López-Villellas, Lorién ; Langarita-Benítez, Rubén ; Badouh, Asaf...
Future Generation Computer Systems.  157 (2024)  - p. 313-329 , 2024
Link: https://doi.org/10.1016/..
 
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2

WFAsic: A High-Performance ASIC Accelerator for DNA Sequenc..:

, In: Proceedings of the 52nd International Conference on Parallel Processing,
Haghi, Abbas ; Alvarez, Lluc ; Front, Jordi... - p. 392-401 , 2023
Link: https://dl.acm.org/doi/1..
 
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3

Mix-GEMM: An efficient HW-SW Architecture for Mixed-Precisi..:

, In: 2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA),
Reggiani, Enrico ; Pappalardo, Alessandro ; Doblas, Max... - p. 1085-1098 , 2023
Link: https://doi.org/10.1109/..
 
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4

GMX: Instruction Set Extensions for Fast, Scalable, and Eff..:

, In: Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture,
Doblas, Max ; Lostes-Cazorla, Oscar ; Aguado-Puig, Quim... - p. 1466-1480 , 2023
Link: https://dl.acm.org/doi/1..
 
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5

Sargantana: An Academic SoC RISC-V Processor in 22nm FDSOI ..:

, In: 2023 38th Conference on Design of Circuits and Integrated Systems (DCIS),
Doblas, Max ; Candon, Gerard ; Carril, Xavier... - p. 1-6 , 2023
Link: https://doi.org/10.1109/..
 
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6

WFA-GPU: gap-affine pairwise read-alignment using GPUs:

Aguado-Puig, Quim ; Doblas, Max ; Matzoros, Christos...
Bioinformatics.  39 (2023)  12 - p. , 2023
Link: https://doi.org/10.1093/..
 
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7

DVINO: A RISC-V Vector Processor Implemented in 65nm Techno..:

, In: 2022 37th Conference on Design of Circuits and Integrated Circuits (DCIS),
Cabo, Guillem ; Candon, Gerard ; Carril, Xavier... - p. 1-6 , 2022
Link: https://doi.org/10.1109/..
 
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8

Sargantana: A 1 GHz+ In-Order RISC-V Processor with SIMD Ve..:

, In: 2022 25th Euromicro Conference on Digital System Design (DSD),
Soria-Pardos, Victor ; Doblas, Max ; Lopez-Paradis, Guillem... - p. 254-261 , 2022
Link: https://doi.org/10.1109/..
 
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9

An Academic RISC-V Silicon Implementation Based on Open-Sou..:

, In: 2020 XXXV Conference on Design of Circuits and Integrated Systems (DCIS),
Abella, Jaume ; Bulla, Calvin ; Cabo, Guillem... - p. 1-6 , 2020
Link: https://doi.org/10.1109/..
 
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10

Enabling hardware randomization across the cache hierarchy ..:

Doblas, Max ; Kostalampros, Ioannis-Vatistas ; Moreto Planas, Miquel.
https://carrv.github.io/2020/papers/CARRV2020_paper_8_Doblas.pdf.  , 2020
Link: http://hdl.handle.net/21..
 
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11

WFA-GPU: Gap-affine pairwise read-alignment using GPUs:

Aguado Puig, Quim ; Doblas Font, Max ; Matzoros, Christos...
https://academic.oup.com/bioinformatics/advance-article/doi/10.1093/bioinformatics/btad701/7425447.  , 2023
Link: http://hdl.handle.net/21..
 
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12

Mix-GEMM: An efficient HW-SW architecture for mixed-precisi..:

Reggiani, Enrico ; Pappalardo, Alessandro ; Doblas Font, Max...
https://ieeexplore.ieee.org/document/10071076.  , 2023
Link: http://hdl.handle.net/21..
 
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13

Sargantana: A 1 GHz+ in-order RISC-V processor with SIMD ve..:

Soria Pardos, Víctor ; Doblas Font, Max ; López Paradís, Guillem...
https://ieeexplore.ieee.org/document/9996608.  , 2022
Link: http://hdl.handle.net/21..
 
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14

DVINO: A RISC-V vector processor implemented in 65nm techno..:

Cabo Pitarch, Guillem ; Candon, Gerard ; Carril, Xavier...
https://ieeexplore.ieee.org/document/9970128.  , 2022
Link: http://hdl.handle.net/21..
 
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15

Microarchitectural design-space exploration of an in-order ..:

Doblas Font, Max ; Wright, Andrew ; Sonmez, Nehir..
Doblas, M. [et al.]. Microarchitectural design-space exploration of an in-order RISC-V processor in a 22nm CMOS technology. A: International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems. "ACACES 2021 poster abstracts: September 15, 2021, Fiuggi, Italy". European Network of Excellence on High Performance and Embedded Architecture and Compilation (HiPEAC), 2021, p. 93-96. ISBN 978-88-905806-8-0..  , 2021
Link: http://hdl.handle.net/21..
 
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