E-LIB Suche - Ergebnisse für: Ferres, Bruno

1

A Transistor Level Relational Semantics for Electrical Rule..:

, In: 2024 Design, Automation & Test in Europe Conference & Exhibition (DATE),

Oulkaid, Oussama ; Ferres, Bruno ; Moy, Matthieu... - p. 1-6 , 2024

2

A Chisel Framework for Flexible Design Space Exploration th..:

Ferres, Bruno ; Muller, Olivier ; Rousseau, Frédéric
ACM Transactions on Design Automation of Electronic Systems. 28 (2023) 4 - p. 1-31 , 2023

Link: https://doi.org/10.1145/..

3

Integrating Quick Resource Estimators in Hardware Construct..:

, In: 2021 IEEE International Workshop on Rapid System Prototyping (RSP),

Ferres, Bruno ; Muller, Olivier ; Rousseau, Frederic - p. 64-70 , 2021

Link: https://doi.org/10.1109/..

4

Chisel Usecase: Designing General Matrix Multiply for FPGA:

, In: Applied Reconfigurable Computing. Architectures, Tools, and Applications; Lecture Notes in Computer Science,

Ferres, Bruno ; Muller, Olivier ; Rousseau, Frédéric - p. 61-72 , 2020

Link: https://doi.org/10.1007/..

5

A Transistor Level Relational Semantics for Electrical Rule..:

Oulkaid, Oussama ; Ferres, Bruno ; Moy, Matthieu...
hal-04527225. , 2024

Link: https://hal.science/hal-..

6

A Transistor Level Relational Semantics for Electrical Rule..:

Oulkaid, Oussama ; Ferres, Bruno ; Moy, Matthieu...
hal-04527225. , 2024

Link: https://hal.science/hal-..

7

A Transistor Level Relational Semantics for Electrical Rule..:

Oulkaid, Oussama ; Ferres, Bruno ; Moy, Matthieu...
hal-04527225. , 2024

Link: https://hal.science/hal-..

8

Electrical Rule Checking of Integrated Circuits using Satis..:

Ferres, Bruno ; Oulkaid, Oussama ; Henrio, Ludovic...
info:eu-repo/semantics/altIdentifier/doi/10.23919/DATE56975.2023.10137147. , 2023

Link: https://hal.science/hal-..

9

A Chisel Framework for Flexible Design Space Exploration th..:

Ferres, Bruno ; Muller, Olivier ; Rousseau, Frédéric
info:eu-repo/semantics/altIdentifier/doi/10.1145/3590769. , 2023

Link: https://hal.science/hal-..

10

A Chisel Framework for Flexible Design Space Exploration th..:

Ferres, Bruno ; Muller, Olivier ; Rousseau, Frédéric
info:eu-repo/semantics/altIdentifier/doi/10.1145/3590769. , 2023

Link: https://hal.science/hal-..

11

Electrical Rule Checking of Integrated Circuits using Satis..:

Ferres, Bruno ; Oulkaid, Oussama ; Henrio, Ludovic...
info:eu-repo/semantics/altIdentifier/doi/10.23919/DATE56975.2023.10137147. , 2023

Link: https://hal.science/hal-..

12

Electrical Rule Checking of Integrated Circuits using Satis..:

Ferres, Bruno ; Oulkaid, Oussama ; Henrio, Ludovic...
hal-04007446. , 2023

Link: https://hal.science/hal-..

13

Electrical Rule Checking of Integrated Circuits using Satis..:

Ferres, Bruno ; Oulkaid, Oussama ; Henrio, Ludovic...
info:eu-repo/semantics/altIdentifier/doi/10.23919/DATE56975.2023.10137147. , 2023

Link: https://hal.science/hal-..

14

A Chisel Framework for Flexible Design Space Exploration th..:

Ferres, Bruno ; Muller, Olivier ; Rousseau, Frédéric
http://arxiv.org/abs/2302.12702. , 2023

Link: http://arxiv.org/abs/230..

15

Leveraging Hardware Construction Languages for Flexible Des..:

Ferres, Bruno
NNT: 2022GRALT025. , 2022

Link: https://theses.hal.scien..