Fleischer, Bruce
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1

14.1 A Software-Assisted Peak Current Regulation Scheme to ..:

, In: 2024 IEEE International Solid-State Circuits Conference (ISSCC),
 
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2

A 7-nm Four-Core Mixed-Precision AI Chip With 26.2-TFLOPS H..:

Lee, Sae Kyu ; Agrawal, Ankur ; Silberman, Joel...
IEEE Journal of Solid-State Circuits.  57 (2022)  1 - p. 182-197 , 2022
 
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3

RaPiD : AI accelerator for ultra-low precision training ..:

, In: Proceedings of the 48th Annual International Symposium on Computer Architecture,
 
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4

RaPiD: AI Accelerator for Ultra-low Precision Training and ..:

, In: 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA),
 
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6

Across the Stack Opportunities for Deep Learning Accelerati..:

, In: Proceedings of the International Symposium on Low Power Electronics and Design,
 
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7

A Scalable Multi-TeraOPS Core for AI Training and Inference:

Shukla, Sunil ; Fleischer, Bruce ; Ziegler, Matthew...
IEEE Solid-State Circuits Letters.  1 (2018)  12 - p. 217-220 , 2018
 
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8

DLFloat: A 16-b Floating Point Format Designed for Deep Lea..:

, In: 2019 IEEE 26th Symposium on Computer Arithmetic (ARITH),
 
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9

Static timing analysis for self resetting circuits:

, In: Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design,
 
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11

Development of a Scalable Electrophilic Amination Protocol ..:

Schäfer, Gabriel ; Fleischer, Tony ; Kastner, Matthias...
Organic Process Research & Development.  27 (2023)  7 - p. 1377-1383 , 2023
 
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