Garros, X.
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1

A Methodology to Address RF Aging of 40nm CMOS PA Cells Und..:

, In: 2024 IEEE International Reliability Physics Symposium (IRPS),
Divay, A. ; Dehos, C. ; Charlet, I.... - p. 4B.2-1-4B.2-6 , 2024
 
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2

Modulation Of HCI in I/O analog devices Through Process Spe..:

, In: 2023 IEEE International Integrated Reliability Workshop (IIRW),
Diouf, C. ; Federspiel, X. ; Bravaix, A.... - p. 1-8 , 2023
 
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3

A cost effective RF-SOI Drain Extended MOS transistor featu..:

, In: 2023 International Electron Devices Meeting (IEDM),
Garros, X. ; Divay, A. ; Lacord, J.... - p. 1-4 , 2023
 
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4

40-nm RFSOI technology exhibiting 90fs RON × COFF and fT/fM..:

, In: ESSDERC 2023 - IEEE 53rd European Solid-State Device Research Conference (ESSDERC),
Cremer, S. ; Pelloux, N. ; Gianesello, F.... - p. 101-104 , 2023
 
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5

3D sequential integration with Si CMOS stacked on 28nm indu..:

, In: 2023 International Electron Devices Meeting (IEDM),
Mota-Frutuoso, T. ; Lapras, V. ; Brunet, L.... - p. 1-4 , 2023
 
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6

Insight Into HCI Reliability on I/O Nitrided Devices:

, In: 2023 IEEE International Reliability Physics Symposium (IRPS),
Doyen, C. ; Yon, V. ; Garros, X.... - p. 1-5 , 2023
 
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7

Methodology for Active Junction Profile Extraction in thin ..:

, In: 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits),
Frutuoso, T. Mota ; Garros, X. ; Batude, P.... - p. 332-333 , 2022
 
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8

Comprehensive Analysis of RF Hot-Carrier Reliability Sensit..:

, In: 2022 IEEE International Reliability Physics Symposium (IRPS),
Hai, J. ; Cacho, F. ; Divay, A.... - p. 4B.2-1-4B.2-6 , 2022
 
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9

3D sequential integration: applications and associated key ..:

, In: 2021 IEEE International Electron Devices Meeting (IEDM),
Batude, P. ; Billoint, O. ; Thuries, S.... - p. 3.2.1-3.2.4 , 2021
 
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10

65nm RFSOI Power Amplifier Transistor Ageing at mm W freque..:

, In: 2021 IEEE International Electron Devices Meeting (IEDM),
Divay, A. ; Forest, J. ; Knopik, V.... - p. 39.3.1-39.3.4 , 2021
 
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11

A Review of Low Temperature Process Modules Leading Up to t..:

Fenouillet-Beranger, C. ; Brunet, L. ; Batude, P....
IEEE Transactions on Electron Devices.  68 (2021)  7 - p. 3142-3148 , 2021
 
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13

All-operation-regime characterization and modeling of drain..:

, In: 2020 IEEE Symposium on VLSI Technology,
Bosch, D. ; Colinge, J.P. ; Ghibaudo, G.... - p. 1-2 , 2020
 
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14

Comparative experimental study of junctionless and inversio..:

, In: 2020 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA),
Bosch, D. ; Colinge, J.P. ; Lugo, J.... - p. 126-127 , 2020
 
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15

Low temperature high voltage analog devices in a 3D sequent..:

, In: 2020 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA),
Cavalcante, C. ; Garros, X. ; Batude, P.... - p. 155-156 , 2020
 
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