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Heechai Kang
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1

Architecture-Aware Analytical Yield Model for Read Access i..:

Heechai Kang ; Jisu Kim ; Hanwool Jeong..
IEEE Transactions on Very Large Scale Integration (VLSI) Systems.  23 (2015)  4 - p. 752-765 , 2015
Link: https://doi.org/10.1109/..
 
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2

An N-Path Filter with Multiphase PWM Clocks for Harmonic Re..:

, In: 2020 IEEE 11th Latin American Symposium on Circuits & Systems (LASCAS),
Rayudu, Venkata Suresh ; Kang, Heechai ; Gharpurey, Ranjit - p. 1-4 , 2020
Link: https://doi.org/10.1109/..
 
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3

A 1.3 V Wideband RF-PWM Cartesian Transmitter Employing Ana..:

, In: 2020 IEEE Radio Frequency Integrated Circuits Symposium (RFIC),
Kang, Heechai ; Rayudu, Venkata S. ; Yong Kim, Ki. - p. 291-294 , 2020
Link: https://doi.org/10.1109/..
 
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4

Efficiency Analysis of a Switched-Capacitor Quadrature Powe..:

, In: 2020 IEEE Texas Symposium on Wireless and Microwave Circuits and Systems (WMCS),
Kang, Heechai ; Kim, Ki Yong ; Gharpurey, Ranjit - p. 1-4 , 2020
Link: https://doi.org/10.1109/..
 
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5

Low Voltage Time-Based Matrix Multiplier-and-Accumulator fo..:

Hong, Sungjin ; Kang, Heechai ; Kim, Jusung.
Electronics.  9 (2020)  12 - p. 2138 , 2020
Link: https://doi.org/10.3390/..
 
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6

Level-Converting Retention Flip-Flop for Reducing Standby P..:

Park, Jung-Hyun ; Kang, Heechai ; Jung, Dong-Hoon..
IEEE Transactions on Very Large Scale Integration (VLSI) Systems.  23 (2015)  3 - p. 413-421 , 2015
Link: https://doi.org/10.1109/..
 
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7

Low Voltage Time-Based Matrix Multiplier-and-Accumulator fo..:

Sungjin Hong ; Heechai Kang ; Jusung Kim.
https://www.mdpi.com/2079-9292/9/12/2138.  , 2020
Link: https://doi.org/10.3390/..
 
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8

Low Voltage Time-Based Matrix Multiplier-and-Accumulator fo..:

Sungjin Hong ; Heechai Kang ; Jusung Kim.
Circuit and Signal Processing.  , 2020
Link: https://doi.org/10.3390/..
 
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9

An N-Path Filter with Multiphase PWM Clocks for Harmonic Re..:

Rayudu, Venkata S ; Kang, Heechai ; Gharpurey, R
http://arxiv.org/abs/1910.14019.  , 2019
Link: http://arxiv.org/abs/191..
 
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