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Hsiao, Shen-Fu
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1

Design of an Efficient Deep Neural Network Accelerator Base..:

, In: 2024 International VLSI Symposium on Technology, Systems and Applications (VLSI TSA),
Hsiao, Shen-Fu ; Lin, Sin-Chen ; Chen, Guan-Lin... - p. 1-4 , 2024
Link: https://doi.org/10.1109/..
 
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2

Neural Network Acceleration Using Digit-Plane Computation w..:

, In: 2024 IEEE International Symposium on Circuits and Systems (ISCAS),
Hsiao, Shen-Fu ; Kuo, Hou-Chun ; Kuo, Yu. - p. 1-4 , 2024
Link: https://doi.org/10.1109/..
 
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3

Hardware Accelerator for MobileViT Vision Transformer with ..:

, In: 2024 IEEE International Symposium on Circuits and Systems (ISCAS),
Hsiao, Shen-Fu ; Chao, Tzu-Hsien ; Yuan, Yen-Che. - p. 1-4 , 2024
Link: https://doi.org/10.1109/..
 
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4

A Power Effective DLA for PBs in Opto-Electrical Neural Net..:

, In: 2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS),
Sangalang, Ralph Gerard B. ; Luo, Shih-Heng ; Wu, Hsin-Che... - p. 46-49 , 2022
Link: https://doi.org/10.1109/..
 
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5

A 40.96-GOPS 196.8-mW Digital Logic Accelerator Used in DNN..:

Wang, Chua-Chin ; Sangalang, Ralph Gerard B. ; Kuo, Chien-Ping...
IEEE Transactions on Circuits and Systems I: Regular Papers.  69 (2022)  12 - p. 4860-4871 , 2022
Link: https://doi.org/10.1109/..
 
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6

Dynamically Swappable Digit-Serial Multi-Precision Deep Neu..:

, In: 2022 IEEE International Symposium on Circuits and Systems (ISCAS),
Hsiao, Shen-Fu ; Li, Hung-Ching ; Yen, Yu-Che. - p. 3107-3110 , 2022
Link: https://doi.org/10.1109/..
 
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7

Flexible Multi-Precision Accelerator Design for Deep Convol..:

, In: 2020 International Symposium on VLSI Design, Automation and Test (VLSI-DAT),
Hsiao, Shen-Fu ; Chen, Yu-Hong - p. 1-4 , 2020
Link: https://doi.org/10.1109/..
 
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8

Sparsity-Aware Deep Learning Accelerator Design Supporting ..:

, In: 2020 IEEE International Symposium on Circuits and Systems (ISCAS),
Hsiao, Shen-Fu ; Chang, Hsuan-Jui - p. 1-4 , 2020
Link: https://doi.org/10.1109/..
 
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9

Hardware Efficient Function Computation Based on Optimized ..:

, In: 2020 IEEE International Symposium on Circuits and Systems (ISCAS),
Hsiao, Shen-Fu ; Wong, Chia-Yang ; Chen, Yu-Chang - p. 1-4 , 2020
Link: https://doi.org/10.1109/..
 
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10

Low-Complexity Deep Neural Networks for Image Object Classi..:

, In: 2019 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS),
Hsiao, Shen-Fu ; Zhan, Jing-Fu ; Lin, Chih-Chien - p. 313-316 , 2019
Link: https://doi.org/10.1109/..
 
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11

Multi-Precision Table-Addition Designs for Computing Nonlin..:

, In: 2019 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS),
Hsiao, Shen-Fu ; Huang, Kuey-Chin ; Chen, Yu-Hong - p. 182-185 , 2019
Link: https://doi.org/10.1109/..
 
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12

Table-Based Circuits for DSP Applications:

, In: Arithmetic Circuits for DSP Applications,
Meher, Pramod Kumar ; Hsiao, Shen-Fu - p. 113-148 , 2017
Link: https://doi.org/10.1002/..
 
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13

Design of Hardware Function Evaluators Using Low-Overhead N..:

Hsiao, Shen-Fu ; Ko, Hou-Jen ; Tseng, Yu-Ling...
IEEE Transactions on Very Large Scale Integration (VLSI) Systems.  21 (2013)  5 - p. 875-886 , 2013
Link: https://doi.org/10.1109/..
 
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14

A nearly constant delay and low power VLSI design of a pipe..:

Wen, Chia-Sheng ; Chen, Yan-Haw ; Truong, Trieu-Kien.
Journal of the Chinese Institute of Engineers.  36 (2013)  6 - p. 771-786 , 2013
Link: https://doi.org/10.1080/..
 
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15

Low Cost Design of an Advanced Encryption Standard (AES) Pr..:

CHEN, Ming-Chih ; HSIAO, Shen-Fu
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences.  E92-A (2009)  12 - p. 3221-3228 , 2009
Link: https://doi.org/10.1587/..
 
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